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27-11-88/MOUSE

This website contains an archive of files for the Acorn Electron, BBC Micro, Acorn Archimedes, Commodore 16 and Commodore 64 computers, which Dominic Ford has rescued from his private collection of floppy disks and cassettes.

Some of these files were originally commercial releases in the 1980s and 1990s, but they are now widely available online. I assume that copyright over them is no longer being asserted. If you own the copyright and would like files to be removed, please contact me.

Tape/disk: Home » CEEFAX disks » telesoftware11.adl
Filename: 27-11-88/MOUSE
Read OK:
File size: 10B9 bytes
Load address: FFFF1900
Exec address: FFFF8023
File contents
   10REM> MOUSE
   20DIM mcode &200 :REM: machine code at mcode
   30xcoord=&80 :REM: x coordinate, range 0-255
   40ycoord=&81 :REM: y coordinate, range 0-255
   50savereg=&FC :REM: interrupt accumulator save register
   60irq1v=&204 :REM: primary interrupt vector
   70drb=&FE60 :REM: data register B
   80ddrb=&FE62 :REM: data direction register B
   90pcr=&FE6C :REM: peripheral control register
  100ifr=&FE6D :REM: interrupt flag register
  110ier=&FE6E :REM: interrupt enable register
  120FOR pass=0 TO 2 STEP 2
  130P%=mcode
  140[OPT pass
  150LDX irq1v \ current primary interrupt vector, low byte
  160LDY irq1v+1 \ current primary interrupt vector, high byte
  170CPY #interrupt DIV 256 \ compare high byte
  180BEQ disable \ restore old vector if altered
  190STX oldirq1v \ save original irq1 vector, low byte
  200STY oldirq1v+1 \ save original irq1 vector, high byte
  210LDX #interrupt MOD 256 \ new irq1 vector, low byte
  220LDY #interrupt DIV 256 \ new irq1 vector, high byte
  230SEI \ set interrupt disable flag
  240STX irq1v \ alter irq1 vector, low byte
  250STY irq1v+1 \ alter irq1 vector, high byte
  260CLI \ clear interrupt disable flag
  270LDA #&98 \ %10011000, ie. enable CB1/2
  280STA ier \ interrupt enable register
  290LDA pcr \ peripheral control register
  300AND #&0F \ AND with %00001111, ie clear bits 4-7
  310ORA #&50 \ OR with %01010000, ie. set bits 4 and 6
  320STA pcr \ interrupt on +ve transition, CB2 input, DRB to clear
  330LDA #&00 \ user port input
  340STA ddrb \ data direction register B
  350STA xcoord \ initial value for x coordinate
  360STA ycoord \ initial value for y coordinate
  370RTS \ return to BASIC
  380.disable
  390LDA #&18 \ %00011000, ready to clear bits 3 and 4 of ier
  400LDX oldirq1v \ original irq1 vector, low byte
  410LDY oldirq1v+1 \ original irq1 vector, high byte
  420SEI \ set interrupt disable flag
  430STA ier \ interrupt enable register
  440LDA pcr \ peripheral control register
  450AND #&0F \ clear bits 4-7
  460STA pcr \ peripheral control register
  470STX irq1v \ restore the original irq1 vector, low byte
  480STY irq1v+1 \ restore the original irq1 vector, high byte
  490CLI \ clear interrupt disable flag
  500RTS \ return to BASIC
  510.interrupt
  520LDA savereg \ interrupt accumulator save register
  530PHA \ and push it on the stack
  540LDA ifr \ interrupt flag register
  550BPL notuser \ bit 7 is set if VIA-B interrupt
  560AND #&18 \ AND with %00011000, ie. test bits 3 and 4
  570BEQ notuser \ exit if not CB1 or CB2
  580AND #&10 \ AND with %00010000, ie. test CB1
  590BNE xpulse \ bit 4 set for an X direction movement
  600LDA drb \ Y direction, load data register B
  610AND #&04 \ AND with %00000100, ie. test bit 2
  620BNE ydown \ if bit 2 is set then Y is going down
  630INC ycoord \ Y is going up so increment Y coordinate
  640BNE exit \ branch if in the range 1 to 255
  650BEQ decy \ if zero then alter to 255
  660.ydown
  670LDA ycoord \ load Y coordinate
  680BEQ exit \ branch if zero because it can't go any lower
  690.decy
  700DEC ycoord \ reduce Y coordinate by 1
  710JMP exit \ restore interrupt accumulator save register and RTI
  720.xpulse
  730LDA drb \ data register B
  740ROR A \ bit 0 into carry
  750BCS xdown \ X is going down if bit 0 is set
  760INC xcoord \ X is going up if bit 0 is clear
  770BNE exit \ exit if X coordinate is in the range from 1 to 255
  780BEQ decx \ if X coordinate = 0 then make it 255
  790.xdown
  800LDA xcoord \ load X coordinate
  810BEQ exit \ if it is zero it can't go any lower
  820.decx
  830DEC xcoord \ decrease X coordinate by 1
  840.exit
  850PLA \ pull interrupt accumulator save register off the stack
  860STA savereg \ and restore zero page
  870RTI \ return from interrupt
  880.notuser
  890PLA \ pull the interrupt accumulator save register off the stack
  900STA savereg \ restore the zero page address
  910JMP (oldirq1v) \ exit via the original vector
  920.oldirq1v
  930EQUW &00 \ original irq1v
  940.lastbyte
  950]
  960NEXT
  970CALL mcode
  980MODE7
  990mouse$=CHR$141+CHR$132+CHR$157+CHR$131+"Mouse coordinates, range &00-&FF  "+CHR$156
 1000PRINTTAB(0,1)mouse$
 1010PRINTTAB(0,2)mouse$
 1020VDU23,1,0;0;0;0;
 1030ONERROR GOTO 1120
 1040PRINTTAB(10,7)"Bytes used = &";~lastbyte-mcode
 1050REPEAT
 1060PRINTTAB(10,12)"X = &";~?&80;" "TAB(20,12);"Y = &";~?&81;" "
 1070button=?drb :REM: data register B
 1080IF (button AND &80)=0 PRINTTAB(22,17)"Right" ELSE PRINTTAB(22,17)"     "
 1090IF (button AND &40)=0 PRINTTAB(15,17)"Centre" ELSE PRINTTAB(15,17)"      "
 1100IF (button AND &20)=0 PRINTTAB(10,17)"Left" ELSE PRINTTAB(10,17)"    "
 1110UNTIL FALSE
 1120VDU23,1,1;0;0;0;
 1130CALL mcode

�> MOUSE
*� mcode &200 :�: machine code at mcode
,xcoord=&80 :�: x coordinate, range 0-255
(,ycoord=&81 :�: y coordinate, range 0-255
27savereg=&FC :�: interrupt accumulator save register
<+irq1v=&204 :�: primary interrupt vector
F!drb=&FE60 :�: data register B
P,ddrb=&FE62 :�: data direction register B
Z-pcr=&FE6C :�: peripheral control register
d)ifr=&FE6D :�: interrupt flag register
n+ier=&FE6E :�: interrupt enable register
x� pass=0 � 2 � 2
�P%=mcode
�
[OPT pass
�:LDX irq1v \ current primary interrupt vector, low byte
�=LDY irq1v+1 \ current primary interrupt vector, high byte
�,CPY #interrupt � 256 \ compare high byte
�/BEQ disable \ restore old vector if altered
�6STX oldirq1v \ save original irq1 vector, low byte
�9STY oldirq1v+1 \ save original irq1 vector, high byte
�4LDX #interrupt � 256 \ new irq1 vector, low byte
�5LDY #interrupt � 256 \ new irq1 vector, high byte
�$SEI \ set interrupt disable flag
�+STX irq1v \ alter irq1 vector, low byte
�.STY irq1v+1 \ alter irq1 vector, high byte
&CLI \ clear interrupt disable flag
*LDA #&98 \ %10011000, ie. enable CB1/2
'STA ier \ interrupt enable register
")LDA pcr \ peripheral control register
,0� #&0F \ � with %00001111, ie clear bits 4-7
64�A #&50 \ � with %01010000, ie. set bits 4 and 6
@BSTA pcr \ interrupt on +ve transition, CB2 input, DRB to clear
JLDA #&00 \ user port input
T(STA ddrb \ data direction register B
^/STA xcoord \ initial value for x coordinate
h/STA ycoord \ initial value for y coordinate
rRTS \ return to BASIC
|.disable
�<LDA #&18 \ %00011000, ready to clear bits 3 and 4 of ier
�1LDX oldirq1v \ original irq1 vector, low byte
�4LDY oldirq1v+1 \ original irq1 vector, high byte
�$SEI \ set interrupt disable flag
�'STA ier \ interrupt enable register
�)LDA pcr \ peripheral control register
�� #&0F \ clear bits 4-7
�)STA pcr \ peripheral control register
�:STX irq1v \ restore the original irq1 vector, low byte
�=STY irq1v+1 \ restore the original irq1 vector, high byte
�&CLI \ clear interrupt disable flag
�RTS \ return to BASIC
�.interrupt
5LDA savereg \ interrupt accumulator save register
"PHA \ and push it on the stack
%LDA ifr \ interrupt flag register
&1BPL notuser \ bit 7 is set if VIA-B interrupt
04� #&18 \ � with %00011000, ie. test bits 3 and 4
:(BEQ notuser \ exit if not CB1 or CB2
D+� #&10 \ � with %00010000, ie. test CB1
N6BNE xpulse \ bit 4 set for an X direction movement
X/LDA drb \ Y direction, load data register B
b-� #&04 \ � with %00000100, ie. test bit 2
l4BNE ydown \ if bit 2 is set then Y is going down
v8INC ycoord \ Y is going up so increment Y coordinate
�.BNE exit \ branch if in the range 1 to 255
�(BEQ decy \ if zero then alter to 255
�
.ydown
�"LDA ycoord \ load Y coordinate
�;BEQ exit \ branch if zero because it can't go any lower
�	.decy
�)DEC ycoord \ reduce Y coordinate by 1
�BJMP exit \ restore interrupt accumulator save register and RTI
�.xpulse
�LDA drb \ data register B
�ROR A \ bit 0 into carry
�/BCS xdown \ X is going down if bit 0 is set
�0INC xcoord \ X is going up if bit 0 is clear
ABNE exit \ exit if X coordinate is in the range from 1 to 255
3BEQ decx \ if X coordinate = 0 then make it 255

.xdown
 "LDA xcoord \ load X coordinate
*2BEQ exit \ if it is zero it can't go any lower
4	.decx
>+DEC xcoord \ decrease X coordinate by 1
H	.exit
R@PLA \ pull interrupt accumulator save register off the stack
\'STA savereg \ and restore zero page
fRTI \ return from interrupt
p.notuser
zDPLA \ pull the interrupt accumulator save register off the stack
�/STA savereg \ restore the zero page address
�1JMP (oldirq1v) \ exit via the original vector
�
.oldirq1v
�EQUW &00 \ original irq1v
�
.lastbyte
�]
��
�� mcode
��7
�Hmouse$=�141+�132+�157+�131+"Mouse coordinates, range &00-&FF  "+�156
��0,1)mouse$
��0,2)mouse$
��23,1,0;0;0;0;

� � �D`D
+�10,7)"Bytes used = &";~lastbyte-mcode
�
$6�10,12)"X = &";~?&80;" "�20,12);"Y = &";~?&81;" "
.#button=?drb :�: data register B
88� (button � &80)=0 �22,17)"Right" � �22,17)"     "
B:� (button � &40)=0 �15,17)"Centre" � �15,17)"      "
L6� (button � &20)=0 �10,17)"Left" � �10,17)"    "
V� �
`�23,1,1;0;0;0;
j� mcode
�
00000000  0d 00 0a 0c f4 3e 20 4d  4f 55 53 45 0d 00 14 2a  |.....> MOUSE...*|
00000010  de 20 6d 63 6f 64 65 20  26 32 30 30 20 3a f4 3a  |. mcode &200 :.:|
00000020  20 6d 61 63 68 69 6e 65  20 63 6f 64 65 20 61 74  | machine code at|
00000030  20 6d 63 6f 64 65 0d 00  1e 2c 78 63 6f 6f 72 64  | mcode...,xcoord|
00000040  3d 26 38 30 20 3a f4 3a  20 78 20 63 6f 6f 72 64  |=&80 :.: x coord|
00000050  69 6e 61 74 65 2c 20 72  61 6e 67 65 20 30 2d 32  |inate, range 0-2|
00000060  35 35 0d 00 28 2c 79 63  6f 6f 72 64 3d 26 38 31  |55..(,ycoord=&81|
00000070  20 3a f4 3a 20 79 20 63  6f 6f 72 64 69 6e 61 74  | :.: y coordinat|
00000080  65 2c 20 72 61 6e 67 65  20 30 2d 32 35 35 0d 00  |e, range 0-255..|
00000090  32 37 73 61 76 65 72 65  67 3d 26 46 43 20 3a f4  |27savereg=&FC :.|
000000a0  3a 20 69 6e 74 65 72 72  75 70 74 20 61 63 63 75  |: interrupt accu|
000000b0  6d 75 6c 61 74 6f 72 20  73 61 76 65 20 72 65 67  |mulator save reg|
000000c0  69 73 74 65 72 0d 00 3c  2b 69 72 71 31 76 3d 26  |ister..<+irq1v=&|
000000d0  32 30 34 20 3a f4 3a 20  70 72 69 6d 61 72 79 20  |204 :.: primary |
000000e0  69 6e 74 65 72 72 75 70  74 20 76 65 63 74 6f 72  |interrupt vector|
000000f0  0d 00 46 21 64 72 62 3d  26 46 45 36 30 20 3a f4  |..F!drb=&FE60 :.|
00000100  3a 20 64 61 74 61 20 72  65 67 69 73 74 65 72 20  |: data register |
00000110  42 0d 00 50 2c 64 64 72  62 3d 26 46 45 36 32 20  |B..P,ddrb=&FE62 |
00000120  3a f4 3a 20 64 61 74 61  20 64 69 72 65 63 74 69  |:.: data directi|
00000130  6f 6e 20 72 65 67 69 73  74 65 72 20 42 0d 00 5a  |on register B..Z|
00000140  2d 70 63 72 3d 26 46 45  36 43 20 3a f4 3a 20 70  |-pcr=&FE6C :.: p|
00000150  65 72 69 70 68 65 72 61  6c 20 63 6f 6e 74 72 6f  |eripheral contro|
00000160  6c 20 72 65 67 69 73 74  65 72 0d 00 64 29 69 66  |l register..d)if|
00000170  72 3d 26 46 45 36 44 20  3a f4 3a 20 69 6e 74 65  |r=&FE6D :.: inte|
00000180  72 72 75 70 74 20 66 6c  61 67 20 72 65 67 69 73  |rrupt flag regis|
00000190  74 65 72 0d 00 6e 2b 69  65 72 3d 26 46 45 36 45  |ter..n+ier=&FE6E|
000001a0  20 3a f4 3a 20 69 6e 74  65 72 72 75 70 74 20 65  | :.: interrupt e|
000001b0  6e 61 62 6c 65 20 72 65  67 69 73 74 65 72 0d 00  |nable register..|
000001c0  78 14 e3 20 70 61 73 73  3d 30 20 b8 20 32 20 88  |x.. pass=0 . 2 .|
000001d0  20 32 0d 00 82 0c 50 25  3d 6d 63 6f 64 65 0d 00  | 2....P%=mcode..|
000001e0  8c 0d 5b 4f 50 54 20 70  61 73 73 0d 00 96 3a 4c  |..[OPT pass...:L|
000001f0  44 58 20 69 72 71 31 76  20 5c 20 63 75 72 72 65  |DX irq1v \ curre|
00000200  6e 74 20 70 72 69 6d 61  72 79 20 69 6e 74 65 72  |nt primary inter|
00000210  72 75 70 74 20 76 65 63  74 6f 72 2c 20 6c 6f 77  |rupt vector, low|
00000220  20 62 79 74 65 0d 00 a0  3d 4c 44 59 20 69 72 71  | byte...=LDY irq|
00000230  31 76 2b 31 20 5c 20 63  75 72 72 65 6e 74 20 70  |1v+1 \ current p|
00000240  72 69 6d 61 72 79 20 69  6e 74 65 72 72 75 70 74  |rimary interrupt|
00000250  20 76 65 63 74 6f 72 2c  20 68 69 67 68 20 62 79  | vector, high by|
00000260  74 65 0d 00 aa 2c 43 50  59 20 23 69 6e 74 65 72  |te...,CPY #inter|
00000270  72 75 70 74 20 81 20 32  35 36 20 5c 20 63 6f 6d  |rupt . 256 \ com|
00000280  70 61 72 65 20 68 69 67  68 20 62 79 74 65 0d 00  |pare high byte..|
00000290  b4 2f 42 45 51 20 64 69  73 61 62 6c 65 20 5c 20  |./BEQ disable \ |
000002a0  72 65 73 74 6f 72 65 20  6f 6c 64 20 76 65 63 74  |restore old vect|
000002b0  6f 72 20 69 66 20 61 6c  74 65 72 65 64 0d 00 be  |or if altered...|
000002c0  36 53 54 58 20 6f 6c 64  69 72 71 31 76 20 5c 20  |6STX oldirq1v \ |
000002d0  73 61 76 65 20 6f 72 69  67 69 6e 61 6c 20 69 72  |save original ir|
000002e0  71 31 20 76 65 63 74 6f  72 2c 20 6c 6f 77 20 62  |q1 vector, low b|
000002f0  79 74 65 0d 00 c8 39 53  54 59 20 6f 6c 64 69 72  |yte...9STY oldir|
00000300  71 31 76 2b 31 20 5c 20  73 61 76 65 20 6f 72 69  |q1v+1 \ save ori|
00000310  67 69 6e 61 6c 20 69 72  71 31 20 76 65 63 74 6f  |ginal irq1 vecto|
00000320  72 2c 20 68 69 67 68 20  62 79 74 65 0d 00 d2 34  |r, high byte...4|
00000330  4c 44 58 20 23 69 6e 74  65 72 72 75 70 74 20 83  |LDX #interrupt .|
00000340  20 32 35 36 20 5c 20 6e  65 77 20 69 72 71 31 20  | 256 \ new irq1 |
00000350  76 65 63 74 6f 72 2c 20  6c 6f 77 20 62 79 74 65  |vector, low byte|
00000360  0d 00 dc 35 4c 44 59 20  23 69 6e 74 65 72 72 75  |...5LDY #interru|
00000370  70 74 20 81 20 32 35 36  20 5c 20 6e 65 77 20 69  |pt . 256 \ new i|
00000380  72 71 31 20 76 65 63 74  6f 72 2c 20 68 69 67 68  |rq1 vector, high|
00000390  20 62 79 74 65 0d 00 e6  24 53 45 49 20 5c 20 73  | byte...$SEI \ s|
000003a0  65 74 20 69 6e 74 65 72  72 75 70 74 20 64 69 73  |et interrupt dis|
000003b0  61 62 6c 65 20 66 6c 61  67 0d 00 f0 2b 53 54 58  |able flag...+STX|
000003c0  20 69 72 71 31 76 20 5c  20 61 6c 74 65 72 20 69  | irq1v \ alter i|
000003d0  72 71 31 20 76 65 63 74  6f 72 2c 20 6c 6f 77 20  |rq1 vector, low |
000003e0  62 79 74 65 0d 00 fa 2e  53 54 59 20 69 72 71 31  |byte....STY irq1|
000003f0  76 2b 31 20 5c 20 61 6c  74 65 72 20 69 72 71 31  |v+1 \ alter irq1|
00000400  20 76 65 63 74 6f 72 2c  20 68 69 67 68 20 62 79  | vector, high by|
00000410  74 65 0d 01 04 26 43 4c  49 20 5c 20 63 6c 65 61  |te...&CLI \ clea|
00000420  72 20 69 6e 74 65 72 72  75 70 74 20 64 69 73 61  |r interrupt disa|
00000430  62 6c 65 20 66 6c 61 67  0d 01 0e 2a 4c 44 41 20  |ble flag...*LDA |
00000440  23 26 39 38 20 5c 20 25  31 30 30 31 31 30 30 30  |#&98 \ %10011000|
00000450  2c 20 69 65 2e 20 65 6e  61 62 6c 65 20 43 42 31  |, ie. enable CB1|
00000460  2f 32 0d 01 18 27 53 54  41 20 69 65 72 20 5c 20  |/2...'STA ier \ |
00000470  69 6e 74 65 72 72 75 70  74 20 65 6e 61 62 6c 65  |interrupt enable|
00000480  20 72 65 67 69 73 74 65  72 0d 01 22 29 4c 44 41  | register..")LDA|
00000490  20 70 63 72 20 5c 20 70  65 72 69 70 68 65 72 61  | pcr \ periphera|
000004a0  6c 20 63 6f 6e 74 72 6f  6c 20 72 65 67 69 73 74  |l control regist|
000004b0  65 72 0d 01 2c 30 80 20  23 26 30 46 20 5c 20 80  |er..,0. #&0F \ .|
000004c0  20 77 69 74 68 20 25 30  30 30 30 31 31 31 31 2c  | with %00001111,|
000004d0  20 69 65 20 63 6c 65 61  72 20 62 69 74 73 20 34  | ie clear bits 4|
000004e0  2d 37 0d 01 36 34 84 41  20 23 26 35 30 20 5c 20  |-7..64.A #&50 \ |
000004f0  84 20 77 69 74 68 20 25  30 31 30 31 30 30 30 30  |. with %01010000|
00000500  2c 20 69 65 2e 20 73 65  74 20 62 69 74 73 20 34  |, ie. set bits 4|
00000510  20 61 6e 64 20 36 0d 01  40 42 53 54 41 20 70 63  | and 6..@BSTA pc|
00000520  72 20 5c 20 69 6e 74 65  72 72 75 70 74 20 6f 6e  |r \ interrupt on|
00000530  20 2b 76 65 20 74 72 61  6e 73 69 74 69 6f 6e 2c  | +ve transition,|
00000540  20 43 42 32 20 69 6e 70  75 74 2c 20 44 52 42 20  | CB2 input, DRB |
00000550  74 6f 20 63 6c 65 61 72  0d 01 4a 1e 4c 44 41 20  |to clear..J.LDA |
00000560  23 26 30 30 20 5c 20 75  73 65 72 20 70 6f 72 74  |#&00 \ user port|
00000570  20 69 6e 70 75 74 0d 01  54 28 53 54 41 20 64 64  | input..T(STA dd|
00000580  72 62 20 5c 20 64 61 74  61 20 64 69 72 65 63 74  |rb \ data direct|
00000590  69 6f 6e 20 72 65 67 69  73 74 65 72 20 42 0d 01  |ion register B..|
000005a0  5e 2f 53 54 41 20 78 63  6f 6f 72 64 20 5c 20 69  |^/STA xcoord \ i|
000005b0  6e 69 74 69 61 6c 20 76  61 6c 75 65 20 66 6f 72  |nitial value for|
000005c0  20 78 20 63 6f 6f 72 64  69 6e 61 74 65 0d 01 68  | x coordinate..h|
000005d0  2f 53 54 41 20 79 63 6f  6f 72 64 20 5c 20 69 6e  |/STA ycoord \ in|
000005e0  69 74 69 61 6c 20 76 61  6c 75 65 20 66 6f 72 20  |itial value for |
000005f0  79 20 63 6f 6f 72 64 69  6e 61 74 65 0d 01 72 19  |y coordinate..r.|
00000600  52 54 53 20 5c 20 72 65  74 75 72 6e 20 74 6f 20  |RTS \ return to |
00000610  42 41 53 49 43 0d 01 7c  0c 2e 64 69 73 61 62 6c  |BASIC..|..disabl|
00000620  65 0d 01 86 3c 4c 44 41  20 23 26 31 38 20 5c 20  |e...<LDA #&18 \ |
00000630  25 30 30 30 31 31 30 30  30 2c 20 72 65 61 64 79  |%00011000, ready|
00000640  20 74 6f 20 63 6c 65 61  72 20 62 69 74 73 20 33  | to clear bits 3|
00000650  20 61 6e 64 20 34 20 6f  66 20 69 65 72 0d 01 90  | and 4 of ier...|
00000660  31 4c 44 58 20 6f 6c 64  69 72 71 31 76 20 5c 20  |1LDX oldirq1v \ |
00000670  6f 72 69 67 69 6e 61 6c  20 69 72 71 31 20 76 65  |original irq1 ve|
00000680  63 74 6f 72 2c 20 6c 6f  77 20 62 79 74 65 0d 01  |ctor, low byte..|
00000690  9a 34 4c 44 59 20 6f 6c  64 69 72 71 31 76 2b 31  |.4LDY oldirq1v+1|
000006a0  20 5c 20 6f 72 69 67 69  6e 61 6c 20 69 72 71 31  | \ original irq1|
000006b0  20 76 65 63 74 6f 72 2c  20 68 69 67 68 20 62 79  | vector, high by|
000006c0  74 65 0d 01 a4 24 53 45  49 20 5c 20 73 65 74 20  |te...$SEI \ set |
000006d0  69 6e 74 65 72 72 75 70  74 20 64 69 73 61 62 6c  |interrupt disabl|
000006e0  65 20 66 6c 61 67 0d 01  ae 27 53 54 41 20 69 65  |e flag...'STA ie|
000006f0  72 20 5c 20 69 6e 74 65  72 72 75 70 74 20 65 6e  |r \ interrupt en|
00000700  61 62 6c 65 20 72 65 67  69 73 74 65 72 0d 01 b8  |able register...|
00000710  29 4c 44 41 20 70 63 72  20 5c 20 70 65 72 69 70  |)LDA pcr \ perip|
00000720  68 65 72 61 6c 20 63 6f  6e 74 72 6f 6c 20 72 65  |heral control re|
00000730  67 69 73 74 65 72 0d 01  c2 1b 80 20 23 26 30 46  |gister..... #&0F|
00000740  20 5c 20 63 6c 65 61 72  20 62 69 74 73 20 34 2d  | \ clear bits 4-|
00000750  37 0d 01 cc 29 53 54 41  20 70 63 72 20 5c 20 70  |7...)STA pcr \ p|
00000760  65 72 69 70 68 65 72 61  6c 20 63 6f 6e 74 72 6f  |eripheral contro|
00000770  6c 20 72 65 67 69 73 74  65 72 0d 01 d6 3a 53 54  |l register...:ST|
00000780  58 20 69 72 71 31 76 20  5c 20 72 65 73 74 6f 72  |X irq1v \ restor|
00000790  65 20 74 68 65 20 6f 72  69 67 69 6e 61 6c 20 69  |e the original i|
000007a0  72 71 31 20 76 65 63 74  6f 72 2c 20 6c 6f 77 20  |rq1 vector, low |
000007b0  62 79 74 65 0d 01 e0 3d  53 54 59 20 69 72 71 31  |byte...=STY irq1|
000007c0  76 2b 31 20 5c 20 72 65  73 74 6f 72 65 20 74 68  |v+1 \ restore th|
000007d0  65 20 6f 72 69 67 69 6e  61 6c 20 69 72 71 31 20  |e original irq1 |
000007e0  76 65 63 74 6f 72 2c 20  68 69 67 68 20 62 79 74  |vector, high byt|
000007f0  65 0d 01 ea 26 43 4c 49  20 5c 20 63 6c 65 61 72  |e...&CLI \ clear|
00000800  20 69 6e 74 65 72 72 75  70 74 20 64 69 73 61 62  | interrupt disab|
00000810  6c 65 20 66 6c 61 67 0d  01 f4 19 52 54 53 20 5c  |le flag....RTS \|
00000820  20 72 65 74 75 72 6e 20  74 6f 20 42 41 53 49 43  | return to BASIC|
00000830  0d 01 fe 0e 2e 69 6e 74  65 72 72 75 70 74 0d 02  |.....interrupt..|
00000840  08 35 4c 44 41 20 73 61  76 65 72 65 67 20 5c 20  |.5LDA savereg \ |
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00000860  6c 61 74 6f 72 20 73 61  76 65 20 72 65 67 69 73  |lator save regis|
00000870  74 65 72 0d 02 12 22 50  48 41 20 5c 20 61 6e 64  |ter..."PHA \ and|
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000008c0  4c 20 6e 6f 74 75 73 65  72 20 5c 20 62 69 74 20  |L notuser \ bit |
000008d0  37 20 69 73 20 73 65 74  20 69 66 20 56 49 41 2d  |7 is set if VIA-|
000008e0  42 20 69 6e 74 65 72 72  75 70 74 0d 02 30 34 80  |B interrupt..04.|
000008f0  20 23 26 31 38 20 5c 20  80 20 77 69 74 68 20 25  | #&18 \ . with %|
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00000910  73 74 20 62 69 74 73 20  33 20 61 6e 64 20 34 0d  |st bits 3 and 4.|
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000010b0  d6 20 6d 63 6f 64 65 0d  ff                       |. mcode..|
000010b9
27-11-88/MOUSE.m0
27-11-88/MOUSE.m1
27-11-88/MOUSE.m2
27-11-88/MOUSE.m4
27-11-88/MOUSE.m5