Home » Archimedes archive » Archimedes World » archimedes_world_volume_15_issue_2_scp.adf » !ARMwrest_ARMwrest » ID1
ID1
This website contains an archive of files for the Acorn Electron, BBC Micro, Acorn Archimedes, Commodore 16 and Commodore 64 computers, which Dominic Ford has rescued from his private collection of floppy disks and cassettes.
Some of these files were originally commercial releases in the 1980s and 1990s, but they are now widely available online. I assume that copyright over them is no longer being asserted. If you own the copyright and would like files to be removed, please contact me.
| Tape/disk: | Home » Archimedes archive » Archimedes World » archimedes_world_volume_15_issue_2_scp.adf » !ARMwrest_ARMwrest |
| Filename: | ID1 |
| Read OK: | ✔ |
| File size: | 04AF bytes |
| Load address: | 0000 |
| Exec address: | 0000 |
File contents
10LIBRARY "MRC/MCR"
20LIBRARY "DecodeID"
30
40ON ERROR PRINT REPORT$;" at ";ERL:END
50
60DIM code% 100
70
80FOR pass%=0 TO 2 STEP 2
90
100P% = code%
110
120[ OPT pass%
130 stmfd r13!,{r14}
140 mov r0,#129
150 mov r1,#0
160 mov r2,#&FF
170 swi "OS_Byte" ; read os version
180 cmp r1,#&A5 ; if it is 3.50 or later
190 bge skip_arm3_check ; skip checking for ARM3
200 mov r0,#0
210 mov r1,#0
220 swi &20280 ; call XCache_Control if it fails, the processor
230 movvs r0,#0 ; is an ARM2 or 250, so return 0
240 ldmvsfd r13!,{pc}^
250.skip_arm3_check
260 swi "OS_EnterOS" ; the processor is ARM3 or later so enter supervisor
270 FNmrc("AL",15,0,0,0,0,0) ; mode and use MRC to read the processor ID register
280 teqp pc,#0 ; return to user mode
290 mov r0,r0 ; must have a no-op after a mode change
300 ldmfd r13!,{pc}^
310]
320
330NEXT pass%
340
350proc_version% = USR(code%)
360
370IF (proc_version%=0) THEN
380 PRINT "Arm 2 or ARM 250 processor"
390ELSE
400 PROCdecode_processor_id(proc_version%)
410ENDIF
420
430END
ț "MRC/MCR"
ț "DecodeID"
(� � � �$;" at ";�:�
2
<� code% 100
F
P� pass%=0 � 2 � 2
Z
dP% = code%
n
x[ OPT pass%
� stmfd r13!,{r14}
� mov r0,#129
� mov r1,#0
� mov r2,#&FF
�7 swi "OS_Byte" ; read os version
�> cmp r1,#&A5 ; if it is 3.50 or later
�> bge skip_arm3_check ; skip checking for ARM3
� mov r0,#0
� mov r1,#0
�V swi &20280 ; call XCache_Control if it fails, the processor
�F movvs r0,#0 ; is an ARM2 or 250, so return 0
� ldmvsfd r13!,{pc}^
�.skip_arm3_check
Z swi "OS_EnterOS" ; the processor is ARM3 or later so enter supervisor
Y �mrc("AL",15,0,0,0,0,0) ; mode and use MRC to read the processor ID register
; teqp pc,#0 ; return to user mode
"M mov r0,r0 ; must have a no-op after a mode change
, ldmfd r13!,{pc}^
6]
@
J � pass%
T
^ proc_version% = �(code%)
h
r� (proc_version%=0) �
|$ � "Arm 2 or ARM 250 processor"
��
�) �decode_processor_id(proc_version%)
��
�
��
� 00000000 0d 00 0a 10 c8 9b 20 22 4d 52 43 2f 4d 43 52 22 |...... "MRC/MCR"|
00000010 0d 00 14 11 c8 9b 20 22 44 65 63 6f 64 65 49 44 |...... "DecodeID|
00000020 22 0d 00 1e 04 0d 00 28 17 ee 20 85 20 f1 20 f6 |"......(.. . . .|
00000030 24 3b 22 20 61 74 20 22 3b 9e 3a e0 0d 00 32 04 |$;" at ";.:...2.|
00000040 0d 00 3c 0f de 20 63 6f 64 65 25 20 31 30 30 0d |..<.. code% 100.|
00000050 00 46 04 0d 00 50 15 e3 20 70 61 73 73 25 3d 30 |.F...P.. pass%=0|
00000060 20 b8 20 32 20 88 20 32 0d 00 5a 04 0d 00 64 0e | . 2 . 2..Z...d.|
00000070 50 25 20 3d 20 63 6f 64 65 25 0d 00 6e 04 0d 00 |P% = code%..n...|
00000080 78 13 5b 20 20 20 20 20 4f 50 54 20 70 61 73 73 |x.[ OPT pass|
00000090 25 0d 00 82 1c 20 20 20 20 20 20 73 74 6d 66 64 |%.... stmfd|
000000a0 20 20 20 72 31 33 21 2c 7b 72 31 34 7d 0d 00 8c | r13!,{r14}...|
000000b0 19 20 20 20 20 20 20 6d 6f 76 20 20 20 20 20 72 |. mov r|
000000c0 30 2c 23 31 32 39 0d 00 96 17 20 20 20 20 20 20 |0,#129.... |
000000d0 6d 6f 76 20 20 20 20 20 72 31 2c 23 30 0d 00 a0 |mov r1,#0...|
000000e0 19 20 20 20 20 20 20 6d 6f 76 20 20 20 20 20 72 |. mov r|
000000f0 32 2c 23 26 46 46 0d 00 aa 37 20 20 20 20 20 20 |2,#&FF...7 |
00000100 73 77 69 20 20 20 20 20 22 4f 53 5f 42 79 74 65 |swi "OS_Byte|
00000110 22 20 20 20 20 20 20 20 20 20 20 20 3b 20 72 65 |" ; re|
00000120 61 64 20 6f 73 20 76 65 72 73 69 6f 6e 0d 00 b4 |ad os version...|
00000130 3e 20 20 20 20 20 20 63 6d 70 20 20 20 20 20 72 |> cmp r|
00000140 31 2c 23 26 41 35 20 20 20 20 20 20 20 20 20 20 |1,#&A5 |
00000150 20 20 20 3b 20 69 66 20 69 74 20 69 73 20 33 2e | ; if it is 3.|
00000160 35 30 20 6f 72 20 6c 61 74 65 72 0d 00 be 3e 20 |50 or later...> |
00000170 20 20 20 20 20 62 67 65 20 20 20 20 20 73 6b 69 | bge ski|
00000180 70 5f 61 72 6d 33 5f 63 68 65 63 6b 20 20 20 20 |p_arm3_check |
00000190 20 3b 20 73 6b 69 70 20 63 68 65 63 6b 69 6e 67 | ; skip checking|
000001a0 20 66 6f 72 20 41 52 4d 33 0d 00 c8 17 20 20 20 | for ARM3.... |
000001b0 20 20 20 6d 6f 76 20 20 20 20 20 72 30 2c 23 30 | mov r0,#0|
000001c0 0d 00 d2 17 20 20 20 20 20 20 6d 6f 76 20 20 20 |.... mov |
000001d0 20 20 72 31 2c 23 30 0d 00 dc 56 20 20 20 20 20 | r1,#0...V |
000001e0 20 73 77 69 20 20 20 20 20 26 32 30 32 38 30 20 | swi &20280 |
000001f0 20 20 20 20 20 20 20 20 20 20 20 20 20 3b 20 63 | ; c|
00000200 61 6c 6c 20 58 43 61 63 68 65 5f 43 6f 6e 74 72 |all XCache_Contr|
00000210 6f 6c 20 69 66 20 69 74 20 66 61 69 6c 73 2c 20 |ol if it fails, |
00000220 74 68 65 20 70 72 6f 63 65 73 73 6f 72 0d 00 e6 |the processor...|
00000230 46 20 20 20 20 20 20 6d 6f 76 76 73 20 20 20 72 |F movvs r|
00000240 30 2c 23 30 20 20 20 20 20 20 20 20 20 20 20 20 |0,#0 |
00000250 20 20 20 3b 20 69 73 20 61 6e 20 41 52 4d 32 20 | ; is an ARM2 |
00000260 6f 72 20 32 35 30 2c 20 73 6f 20 72 65 74 75 72 |or 250, so retur|
00000270 6e 20 30 0d 00 f0 1c 20 20 20 20 20 20 6c 64 6d |n 0.... ldm|
00000280 76 73 66 64 20 72 31 33 21 2c 7b 70 63 7d 5e 0d |vsfd r13!,{pc}^.|
00000290 00 fa 14 2e 73 6b 69 70 5f 61 72 6d 33 5f 63 68 |....skip_arm3_ch|
000002a0 65 63 6b 0d 01 04 5a 20 20 20 20 20 20 73 77 69 |eck...Z swi|
000002b0 20 20 20 20 20 22 4f 53 5f 45 6e 74 65 72 4f 53 | "OS_EnterOS|
000002c0 22 20 20 20 20 20 20 20 20 3b 20 74 68 65 20 70 |" ; the p|
000002d0 72 6f 63 65 73 73 6f 72 20 69 73 20 41 52 4d 33 |rocessor is ARM3|
000002e0 20 6f 72 20 6c 61 74 65 72 20 73 6f 20 65 6e 74 | or later so ent|
000002f0 65 72 20 73 75 70 65 72 76 69 73 6f 72 0d 01 0e |er supervisor...|
00000300 59 20 20 20 20 20 20 a4 6d 72 63 28 22 41 4c 22 |Y .mrc("AL"|
00000310 2c 31 35 2c 30 2c 30 2c 30 2c 30 2c 30 29 20 20 |,15,0,0,0,0,0) |
00000320 20 20 3b 20 6d 6f 64 65 20 61 6e 64 20 75 73 65 | ; mode and use|
00000330 20 4d 52 43 20 74 6f 20 72 65 61 64 20 74 68 65 | MRC to read the|
00000340 20 70 72 6f 63 65 73 73 6f 72 20 49 44 20 72 65 | processor ID re|
00000350 67 69 73 74 65 72 0d 01 18 3b 20 20 20 20 20 20 |gister...; |
00000360 74 65 71 70 20 20 20 20 70 63 2c 23 30 20 20 20 |teqp pc,#0 |
00000370 20 20 20 20 20 20 20 20 20 20 20 20 3b 20 72 65 | ; re|
00000380 74 75 72 6e 20 74 6f 20 75 73 65 72 20 6d 6f 64 |turn to user mod|
00000390 65 0d 01 22 4d 20 20 20 20 20 20 6d 6f 76 20 20 |e.."M mov |
000003a0 20 20 20 72 30 2c 72 30 20 20 20 20 20 20 20 20 | r0,r0 |
000003b0 20 20 20 20 20 20 20 3b 20 6d 75 73 74 20 68 61 | ; must ha|
000003c0 76 65 20 61 20 6e 6f 2d 6f 70 20 61 66 74 65 72 |ve a no-op after|
000003d0 20 61 20 6d 6f 64 65 20 63 68 61 6e 67 65 0d 01 | a mode change..|
000003e0 2c 1c 20 20 20 20 20 20 6c 64 6d 66 64 20 20 20 |,. ldmfd |
000003f0 72 31 33 21 2c 7b 70 63 7d 5e 0d 01 36 05 5d 0d |r13!,{pc}^..6.].|
00000400 01 40 04 0d 01 4a 0b ed 20 70 61 73 73 25 0d 01 |.@...J.. pass%..|
00000410 54 04 0d 01 5e 1c 70 72 6f 63 5f 76 65 72 73 69 |T...^.proc_versi|
00000420 6f 6e 25 20 3d 20 ba 28 63 6f 64 65 25 29 0d 01 |on% = .(code%)..|
00000430 68 04 0d 01 72 19 e7 20 28 70 72 6f 63 5f 76 65 |h...r.. (proc_ve|
00000440 72 73 69 6f 6e 25 3d 30 29 20 8c 0d 01 7c 24 20 |rsion%=0) ...|$ |
00000450 20 f1 20 22 41 72 6d 20 32 20 6f 72 20 41 52 4d | . "Arm 2 or ARM|
00000460 20 32 35 30 20 70 72 6f 63 65 73 73 6f 72 22 0d | 250 processor".|
00000470 01 86 05 cc 0d 01 90 29 20 20 f2 64 65 63 6f 64 |.......) .decod|
00000480 65 5f 70 72 6f 63 65 73 73 6f 72 5f 69 64 28 70 |e_processor_id(p|
00000490 72 6f 63 5f 76 65 72 73 69 6f 6e 25 29 0d 01 9a |roc_version%)...|
000004a0 05 cd 0d 01 a4 06 20 20 0d 01 ae 05 e0 0d ff |...... .......|
000004af 
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