� M.R.A.Barnett
� 30 Nov 1994

(5� Puts square root of 'src' (unsigned) into 'dst'
2*� Note: 'dst' CAN be the same as 'src'
<
F� �Sqrt(dst, src)
P9� FreeReg%, num, square, bit, one, temp, next_bit, sp
Z	sp=13
d&FreeReg% = (1 << dst) � (1 << src)
nsquare = �_AllocateRegister
xbit = �_AllocateRegister
�one = �_AllocateRegister
�temp = �_AllocateRegister
�� dst = src �
�  num = �_AllocateRegister
�  [OPT pass%
�,   STMFD (sp)!,{num,square,bit,one,temp}
�   MOV num,src
�  ]
��
�  num = src
�  [OPT pass%
�(   STMFD (sp)!,{square,bit,one,temp}
�  ]

�

[OPT pass%

 MOV dst,#0

" MOV square,#0

, MOV bit,#15

6 MOV one,#1

@ .next_bit

J MOV temp,dst,LSL #1

T ADD temp,temp,one,LSL bit

^! ADD temp,square,temp,LSL bit

h CMP temp,src

r MOVLS square,temp

| ADDLS dst,dst,one,LSL bit

� SUBS bit,bit,#1

� BPL next_bit

�]

�� dst = src �

�  [OPT pass%

�,   LDMFD (sp)!,{num,square,bit,one,temp}

�  ]

��

�  [OPT pass%

�(   LDMFD (sp)!,{square,bit,one,temp}

�  ]

��

�= 0

� �_AllocateRegister

� Reg%
&$ȕ (FreeReg% � (1 << Reg%)) <> 0
0  Reg% += 1
:�
D%FreeReg% = FreeReg% � (1 << Reg%)
N
= Reg%
�

00000000  0d 00 0a 13 f4 20 4d 2e  52 2e 41 2e 42 61 72 6e  |..... M.R.A.Barn|
00000010  65 74 74 0d 00 14 11 f4  20 33 30 20 4e 6f 76 20  |ett..... 30 Nov |
00000020  31 39 39 34 0d 00 1e 04  0d 00 28 35 f4 20 50 75  |1994......(5. Pu|
00000030  74 73 20 73 71 75 61 72  65 20 72 6f 6f 74 20 6f  |ts square root o|
00000040  66 20 27 73 72 63 27 20  28 75 6e 73 69 67 6e 65  |f 'src' (unsigne|
00000050  64 29 20 69 6e 74 6f 20  27 64 73 74 27 0d 00 32  |d) into 'dst'..2|
00000060  2a f4 20 4e 6f 74 65 3a  20 27 64 73 74 27 20 43  |*. Note: 'dst' C|
00000070  41 4e 20 62 65 20 74 68  65 20 73 61 6d 65 20 61  |AN be the same a|
00000080  73 20 27 73 72 63 27 0d  00 3c 04 0d 00 46 15 dd  |s 'src'..<...F..|
00000090  20 a4 53 71 72 74 28 64  73 74 2c 20 73 72 63 29  | .Sqrt(dst, src)|
000000a0  0d 00 50 39 ea 20 46 72  65 65 52 65 67 25 2c 20  |..P9. FreeReg%, |
000000b0  6e 75 6d 2c 20 73 71 75  61 72 65 2c 20 62 69 74  |num, square, bit|
000000c0  2c 20 6f 6e 65 2c 20 74  65 6d 70 2c 20 6e 65 78  |, one, temp, nex|
000000d0  74 5f 62 69 74 2c 20 73  70 0d 00 5a 09 73 70 3d  |t_bit, sp..Z.sp=|
000000e0  31 33 0d 00 64 26 46 72  65 65 52 65 67 25 20 3d  |13..d&FreeReg% =|
000000f0  20 28 31 20 3c 3c 20 64  73 74 29 20 84 20 28 31  | (1 << dst) . (1|
00000100  20 3c 3c 20 73 72 63 29  0d 00 6e 1f 73 71 75 61  | << src)..n.squa|
00000110  72 65 20 3d 20 a4 5f 41  6c 6c 6f 63 61 74 65 52  |re = ._AllocateR|
00000120  65 67 69 73 74 65 72 0d  00 78 1c 62 69 74 20 3d  |egister..x.bit =|
00000130  20 a4 5f 41 6c 6c 6f 63  61 74 65 52 65 67 69 73  | ._AllocateRegis|
00000140  74 65 72 0d 00 82 1c 6f  6e 65 20 3d 20 a4 5f 41  |ter....one = ._A|
00000150  6c 6c 6f 63 61 74 65 52  65 67 69 73 74 65 72 0d  |llocateRegister.|
00000160  00 8c 1d 74 65 6d 70 20  3d 20 a4 5f 41 6c 6c 6f  |...temp = ._Allo|
00000170  63 61 74 65 52 65 67 69  73 74 65 72 0d 00 96 11  |cateRegister....|
00000180  e7 20 64 73 74 20 3d 20  73 72 63 20 8c 0d 00 a0  |. dst = src ....|
00000190  1e 20 20 6e 75 6d 20 3d  20 a4 5f 41 6c 6c 6f 63  |.  num = ._Alloc|
000001a0  61 74 65 52 65 67 69 73  74 65 72 0d 00 aa 10 20  |ateRegister.... |
000001b0  20 5b 4f 50 54 20 70 61  73 73 25 0d 00 b4 2c 20  | [OPT pass%..., |
000001c0  20 20 53 54 4d 46 44 20  28 73 70 29 21 2c 7b 6e  |  STMFD (sp)!,{n|
000001d0  75 6d 2c 73 71 75 61 72  65 2c 62 69 74 2c 6f 6e  |um,square,bit,on|
000001e0  65 2c 74 65 6d 70 7d 0d  00 be 12 20 20 20 4d 4f  |e,temp}....   MO|
000001f0  56 20 6e 75 6d 2c 73 72  63 0d 00 c8 07 20 20 5d  |V num,src....  ]|
00000200  0d 00 d2 05 cc 0d 00 dc  0f 20 20 6e 75 6d 20 3d  |.........  num =|
00000210  20 73 72 63 0d 00 e6 10  20 20 5b 4f 50 54 20 70  | src....  [OPT p|
00000220  61 73 73 25 0d 00 f0 28  20 20 20 53 54 4d 46 44  |ass%...(   STMFD|
00000230  20 28 73 70 29 21 2c 7b  73 71 75 61 72 65 2c 62  | (sp)!,{square,b|
00000240  69 74 2c 6f 6e 65 2c 74  65 6d 70 7d 0d 00 fa 07  |it,one,temp}....|
00000250  20 20 5d 0d 01 04 05 cd  0d 01 0e 0e 5b 4f 50 54  |  ].........[OPT|
00000260  20 70 61 73 73 25 0d 01  18 0f 20 4d 4f 56 20 64  | pass%.... MOV d|
00000270  73 74 2c 23 30 0d 01 22  12 20 4d 4f 56 20 73 71  |st,#0..". MOV sq|
00000280  75 61 72 65 2c 23 30 0d  01 2c 10 20 4d 4f 56 20  |uare,#0..,. MOV |
00000290  62 69 74 2c 23 31 35 0d  01 36 0f 20 4d 4f 56 20  |bit,#15..6. MOV |
000002a0  6f 6e 65 2c 23 31 0d 01  40 0e 20 2e 6e 65 78 74  |one,#1..@. .next|
000002b0  5f 62 69 74 0d 01 4a 18  20 4d 4f 56 20 74 65 6d  |_bit..J. MOV tem|
000002c0  70 2c 64 73 74 2c 4c 53  4c 20 23 31 0d 01 54 1e  |p,dst,LSL #1..T.|
000002d0  20 41 44 44 20 74 65 6d  70 2c 74 65 6d 70 2c 6f  | ADD temp,temp,o|
000002e0  6e 65 2c 4c 53 4c 20 62  69 74 0d 01 5e 21 20 41  |ne,LSL bit..^! A|
000002f0  44 44 20 74 65 6d 70 2c  73 71 75 61 72 65 2c 74  |DD temp,square,t|
00000300  65 6d 70 2c 4c 53 4c 20  62 69 74 0d 01 68 11 20  |emp,LSL bit..h. |
00000310  43 4d 50 20 74 65 6d 70  2c 73 72 63 0d 01 72 16  |CMP temp,src..r.|
00000320  20 4d 4f 56 4c 53 20 73  71 75 61 72 65 2c 74 65  | MOVLS square,te|
00000330  6d 70 0d 01 7c 1e 20 41  44 44 4c 53 20 64 73 74  |mp..|. ADDLS dst|
00000340  2c 64 73 74 2c 6f 6e 65  2c 4c 53 4c 20 62 69 74  |,dst,one,LSL bit|
00000350  0d 01 86 14 20 53 55 42  53 20 62 69 74 2c 62 69  |.... SUBS bit,bi|
00000360  74 2c 23 31 0d 01 90 11  20 42 50 4c 20 6e 65 78  |t,#1.... BPL nex|
00000370  74 5f 62 69 74 0d 01 9a  05 5d 0d 01 a4 11 e7 20  |t_bit....]..... |
00000380  64 73 74 20 3d 20 73 72  63 20 8c 0d 01 ae 10 20  |dst = src ..... |
00000390  20 5b 4f 50 54 20 70 61  73 73 25 0d 01 b8 2c 20  | [OPT pass%..., |
000003a0  20 20 4c 44 4d 46 44 20  28 73 70 29 21 2c 7b 6e  |  LDMFD (sp)!,{n|
000003b0  75 6d 2c 73 71 75 61 72  65 2c 62 69 74 2c 6f 6e  |um,square,bit,on|
000003c0  65 2c 74 65 6d 70 7d 0d  01 c2 07 20 20 5d 0d 01  |e,temp}....  ]..|
000003d0  cc 05 cc 0d 01 d6 10 20  20 5b 4f 50 54 20 70 61  |.......  [OPT pa|
000003e0  73 73 25 0d 01 e0 28 20  20 20 4c 44 4d 46 44 20  |ss%...(   LDMFD |
000003f0  28 73 70 29 21 2c 7b 73  71 75 61 72 65 2c 62 69  |(sp)!,{square,bi|
00000400  74 2c 6f 6e 65 2c 74 65  6d 70 7d 0d 01 ea 07 20  |t,one,temp}.... |
00000410  20 5d 0d 01 f4 05 cd 0d  01 fe 07 3d 20 30 0d 02  | ].........= 0..|
00000420  08 04 0d 02 12 18 dd 20  a4 5f 41 6c 6c 6f 63 61  |....... ._Alloca|
00000430  74 65 52 65 67 69 73 74  65 72 0d 02 1c 0a ea 20  |teRegister..... |
00000440  52 65 67 25 0d 02 26 24  c8 95 20 28 46 72 65 65  |Reg%..&$.. (Free|
00000450  52 65 67 25 20 80 20 28  31 20 3c 3c 20 52 65 67  |Reg% . (1 << Reg|
00000460  25 29 29 20 3c 3e 20 30  0d 02 30 0f 20 20 52 65  |%)) <> 0..0.  Re|
00000470  67 25 20 2b 3d 20 31 0d  02 3a 05 ce 0d 02 44 25  |g% += 1..:....D%|
00000480  46 72 65 65 52 65 67 25  20 3d 20 46 72 65 65 52  |FreeReg% = FreeR|
00000490  65 67 25 20 84 20 28 31  20 3c 3c 20 52 65 67 25  |eg% . (1 << Reg%|
000004a0  29 0d 02 4e 0a 3d 20 52  65 67 25 0d ff           |)..N.= Reg%..|
000004ad