15-01-88/T\OSB10

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15-01-88/T\OSB10

This website contains an archive of files for the Acorn Electron, BBC Micro, Acorn Archimedes, Commodore 16 and Commodore 64 computers, which Dominic Ford has rescued from his private collection of floppy disks and cassettes.

Some of these files were originally commercial releases in the 1980s and 1990s, but they are now widely available online. I assume that copyright over them is no longer being asserted. If you own the copyright and would like files to be removed, please contact me.

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Filename:	15-01-88/T\OSB10
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File size:	3C48 bytes
Load address:	0000
Exec address:	FFFFFFFF

File contents

OSBITS - An Exploration of the BBC Micro at Machine Level

By Programmer

...........................................................


Part 10: Opcodes and Error Messages

Two things in this module.  Later I will be looking briefly
at errors and exceptions, in other words things that can go
awry and how to cope with them.  Firstly though a summary of
the commands that a 6502 microprocessor will understand. 
These are in the form of mnemonics and are known as its
opcodes (a piece of jargon I have avoided until now but a
useful shorthand nonetheless!).

Most reference books on the 6502 give the opcodes in
alphabetical order, so I shall be different and group them
according to function.  This will, I hope, make it easy to
pick the one you want for a particular purpose.  I shall not
give details of how many bytes go with the opcode or how
many ticks of the micro's clock it takes to execute one
since this information is more of use when you are refining
your code writing rather than when you are starting out. 
This information should be found in your advanced reference
guides or indeed any book on a 6502.  If this series were a
book then this would be an appendix (with all the bytes and
timings) but in a telesoftware transmission it's more of a
useful aside.

A reminder about addressing modes.  I have talked about the
various modes of addressing in previous modules.  Rather
than describe them by their names, like immediate or
pre-indexed indirect, I shall give you the form of the
opcode if it is available from the 6502.  In all cases all
you need to remember is this:

  #         after the opcode means use a number directly
            (a byte sized number)
  A         means act on the accumulator
  zp        means act on an address in zero page
  mem       means act on an address anywhere else in memory
  (mem)     means act on an address held in location mem
            and mem+1
  mem, Reg  means act on the address mem plus the value
            in Reg

In some cases you will find that where you might expect
(mem) you will find (zp).  In these cases you need to be in
zero page to use that particular addressing mode.  Basically
if it's in brackets it's an indirect address.

There are several cases where you will find an indexed
address in zero page using the X register but not with the Y
register.  Now the assembler will not flag an error if you
try to do, say, an  LDA zp, Y  by mistake, and the assembled
code will almost certainly run correctly.  The only effect
of doing this is that you will not be using a zero page
addressing mode, simply an ordinary mode in zero page.  The
difference is that you will take up one more byte with your
code and use a little more time because of this.  If you use
the incorrect index with one of the indirect modes the
assembler will tell you.

____________________________________________________________

Group 1: Loading and Saving Bytes

LDA - Load the accumulator

LDA #     LDA mem      LDA mem, X     LDA mem, Y
LDA zp    LDA zp, X    LDA (zp, X)    LDA (zp), Y

LDX - Load the X register

LDX #    LDX mem    LDY mem, Y    LDX zp    LDX zp, Y

LDY - Load the Y register

LDY #    LDY mem    LDY mem, X    LDY zp    LDY zp, X

In all these cases after the operation the zero flag and the
negative flag are affected, reflecting the number loaded.

STA - Store the accumulator

STA mem    STA mem, X    STA mem, Y    STA zp    STA zp, X
STA (zp, X)   STA (zp), Y

STX - Store the X register

STX mem    STY zp    STY zp, Y

STY - Store the Y register

STY mem    STY zp    STY zp, X

No flags are affected by storing a byte and the byte still
remains in the register.

____________________________________________________________

Group 2: Transferring between registers, and between a
register and the stack.

The opcodes in this group have only one addressing mode,
called implied mode.

TAX - Transfer the accumulator into the X register

TAY - Transfer the accumulator into the Y register

TXA - Transfer the X register into the accumulator

TYA - Transfer the Y register into the accumulator

TSX - Transfer the stack pointer into the X register

TSX - Transfer the X register to the stack pointer

PHA - Push the accumulator onto the stack

PLA - Pull the accumulator from the stack

PHP - Push the processor status register (the flags byte)
onto the stack.

PLP - Pull the processor status register from the stack

Transfers to a register (not to the stack) affect the zero
and negative flags.  Transfers from a register (again not
the stack) will leave the byte in the original register. 
Pulling the status register from the stack will affect every
flag because the status register is the byte containing the
flags.

The stack pointer should be handled with extreme care or you
will probably crash the machine and have to start again by
pressing BREAK.  Every push to the stack must be balanced by
a pull from the stack later in the execution of the program.

____________________________________________________________

Group 3: Adding, Subtracting and Shifting

ADC - Add to the accumulator, plus the value of the carry
flag, and store in the accumulator.  Addressing modes
exactly as for LDA.

SBC - Subtract from the accumulator, using the carry flag to
borrow from an adjacent byte.  Addressing modes exactly as
for LDA.

The carry, zero, overflow and negative flags are affected by
an ADC and an SBC.

ASL - Arithmetic shift left.  This shifts the bits of
memory, or the accumulator, to the left.  This multiplies
the value of the byte by 2.  Bit 7 moves into the carry flag
and a zero is shifted into bit 0.

ASL A    ASL mem    ASL mem, X    ASL zp    ASL zp, X

The carry flag becomes the old value of bit 7, the negative
flag is set to the value of bit 7 (the old bit 6), the zero
flag is also affected.

LSR - Logical shift right.  The opposite of an ASL this
shifts the bits to the right, moves a zero into bit 7 and
moves bit 0 into the carry flag.  The operation effectively
divides the byte by 2.

Addressing modes as for ASL.  The carry flag is set to the
old value of bit 0, the negative flag is always cleared and
the zero flag is affected.

ROL - Rotate left one bit.  Similar to ASL except that the
carry flag value is transferred into bit 0.  Otherwise the
flags and address modes are as for ASL.

ROR - Rotate right one bit.  Similar to LSR except that the
carry flag value is transferred into bit 7.  Otherwise the
flags and address modes are as for LSR.

In these last two cases, if you were to carry out the
operation 9 times you would be back where you started!  Also
note that as the carry flag is pushed into your byte by ROL
and ROR you should know its state beforehand.

____________________________________________________________

Group 4: Increasing and Decreasing by One

INC - Increase the byte held in a memory location by one.

INC mem    INC mem, X    INC zp    INC zp, X

DEC - Decrease the byte held in a memory location by one.

Addressing modes as for INC.

INX - Increase the X register by one

DEX - Decrease the X register by one

INY - Increase the Y register by one

DEY - Decrease the Y register by one

In all cases in this group the zero and negative flags are
affected by the operation.  Note that if a location or
register contains 255 and is increased it will wrap around
to zero and set the zero flag.  Also decreasing zero by one
produces 255 in the location.

____________________________________________________________

Group 5:  Comparisons

These three opcodes compare the register concerned with a
byte, either in immediate mode (i.e. #) or a byte in memory. 
The processor flags are set accordingly but the register
itself is unchanged.  In fact the processor is subtracting
the number from the accumulator but not storing the result
and the state of the flags reflects this operation.  These
opcodes are very useful.

CMP - Compare with accumulator.  Addressing modes as for
LDA.  Flags as follows:

Carry set if the number was >= to A
Zero set if the number = A
Negative set if bit 7 of the result is set (less useful)

CPX - Compare with the X register

CPX #    CPX mem    CPX zp

Flags as for CMP

CPY - Compare with the Y register.  Addressing and flags as
for CPX.

____________________________________________________________

Group 6:  Branching

All opcodes in this group have a single addressing mode
called relative.  You can only branch +127 or -128 bytes
from your present position.  Any attempt to go further will
result in a 'Branch out of range' error.  (Often a sign that
you ought to be using more subroutines in your loops.)


BCC - Branch when carry is clear

BCS - Branch when carry is set

BEQ - Branch when zero flag is set

BNE - Branch when zero flag is clear

BMI - Branch when negative flag is set

BPL - Branch when negative flag is clear

BVC - Branch when overflow flag is clear

BVS - Branch when overflow flag is set

No flags are affected by a branch and note that the settings
of flags after a CMP, CPX or CPY are given in the previous
section.

You can perform a branch of over the 127/-128 limit by
branching to a label where you have placed a JMP.  This
is known as a long branch.

____________________________________________________________

Group 7:  Jumps

JSR - Jump to a subroutine

JSR mem

RTS - Return from a subroutine

JMP - Jump to a new location

JMP mem    JMP (mem)

In all cases no flags are affected.  Note that with JSR and
RTS the top of the stack is used to hold return addresses
and so no pulls or pushes of registers should occur either
side as they will not work correctly.  There is also a bug
in the 6502 which stops JMP (mem) working correctly if mem
is at the top of a page (i.e. if it ends in &FF).  You will
have to watch for this in your code yourself if you use this
indirect jump.


____________________________________________________________

Group 8:  Logic

AND - AND location with the accumulator and store the result
in the accumulator.

Addressing modes as for LDA.  Zero and negative flags are
affected.

BIT - And location with accumulator but do not store the
result.  Zero flag is set if the result is zero and bits 6
and 7 of the byte held at the location are transferred into
the overflow and negative flags respectively.

BIT mem    BIT zp

EOR - EOR location with the accumulator and store the result
in the accumulator.

Addressing modes as for LDA.  Zero and negative flags are
affected.

ORA - OR location with the accumulator and store the result
in the accumulator.

Addressing modes as for LDA.  Zero and negative flags are
affected.

____________________________________________________________

Group 9:  Setting/Clearing Flags

There is only one addressing mode for this group, implied.

SEC - Set carry flag

CLC - Clear carry flag

SED - Set decimal flag (calculate in BCD)

CLD - Clear decimal flag (calculate in binary)

SEI - Set interrupt disable flag (more on interrupts in a
later module, use with caution.)

CLI - Clear interrupt flag i.e. enable interrupts.

CLV - Clear overflow flag (no implicit setting of this flag)

____________________________________________________________

Group 10:  Others

BRK - BREAK (not like the BREAK key) and force an interrupt. 
This is used in error trapping and sets the break flag.

NOP - No operation, do nothing.  Useful to slow down a loop
or to force bytes onto even byte boundaries for 16bit
working.  Affects no flags.

RTI - Return from an interrupt.  A specialist equivalent to
RTS which I will come onto in a later module.


Recent versions of the 6502 (like the 65C02) contain extra
opcodes which can make for more efficient code.  Things like
storing zero directly with an STZ or a BRA branch always
opcode are useful additions.  However if you want your code
to run in every BBC micro the above list is the limit of
your opcodes.  There were some earlier versions of the 6502
which did not have all these opcodes.  ROR is a code that is
missing from some early 6502s.


Finally a few words about errors and exceptions.  In general
most errors are actually exceptions.  They are where the
result of an operation is outside the limits of correct
operation.  This could be because the user has entered too
large a number or because the program will attempt to divide
by zero.  It could be that the user has entered a number
when you wanted a letter.  Alternatively the escape key
might have been pressed or there might not have been a disc
in the drive when the user tried to write to a file.

I think it is safe to say that you should anticipate every
error condition or exception and build something into your
routine to cope.  In some circumstances your code would
report the error and ask for a re-try and you would not
actually exit the routine.  This is what I am calling
an exception.  In other circumstances your code would exit
and drop you back to the language from which you had called
the routine.  A utility ROM might refuse to carry out an
improper instruction and return you to BASIC; this would be
an error.

Dealing with errors is actually very simple with the BBC
Micro because there is a default routine available in BASIC. 
Other languages I have tried on the BBC Micro also have
error routines which operate in the same way.  Now you could
intercept the break vector and write an error handling
routine of your own but I submit that it is probably not
worth it.  Here's how you use the default routine.

Imagine that you want to generate an error condition when
the code branches to a label called error.  Here is what you
would put at that label.

         .error
         BRK
         EQUB 255
         EQUS "You have just done something silly."
         EQUB 0

The BRK forces a software interrupt and when this happens
the processor automatically jumps down the break vector to
the default routine.  The default routine expects an error
number in the byte following the BRK.  In this example I
have given the number 255.  This is then followed by a
string which the routine will print out.  The string is
terminated by a null (zero) byte.

There is one occasion when this system will fail, and that
is when your code is in a sideways ROM and is not a
language.  To counter this you have to copy your sequence of
bytes into the bottom of the stack (from location &100) and
then point the code there.  I'll deal with this in more
detail when I get onto sideways ROM formatting in a later
module so don't worry about it for the moment.

The assembler routine in this module is a small one which
illustrates this error handling.  You press a key and if you
press a number (0-9) the routine loops but if you press
anything else an error is generated and a message is printed
out.  I have included a special bit of code that deals with
an escape in a different way to the standard escape by
printing a different message.

If you can call this routine from another language (like
View) you will see how it still operates.  If you have a
6502 second processor or a MASTER the easiest way to do so
is using the OS command *GO nnnn where nnnn is the value of
code% in HEX.

The next five modules deal in some detail with input and
output.  Anything involving input needs copious error
handling.  These will also introduce multiplication and
division and by the end of them we will have a way of
inputting and outputting numbers of any size within reason
and our arithmetical work on integers will be complete.

00000000  4f 53 42 49 54 53 20 2d  20 41 6e 20 45 78 70 6c  |OSBITS - An Expl|
00000010  6f 72 61 74 69 6f 6e 20  6f 66 20 74 68 65 20 42  |oration of the B|
00000020  42 43 20 4d 69 63 72 6f  20 61 74 20 4d 61 63 68  |BC Micro at Mach|
00000030  69 6e 65 20 4c 65 76 65  6c 0d 0d 42 79 20 50 72  |ine Level..By Pr|
00000040  6f 67 72 61 6d 6d 65 72  0d 0d 2e 2e 2e 2e 2e 2e  |ogrammer........|
00000050  2e 2e 2e 2e 2e 2e 2e 2e  2e 2e 2e 2e 2e 2e 2e 2e  |................|
*
00000080  2e 2e 2e 2e 2e 0d 0d 0d  50 61 72 74 20 31 30 3a  |........Part 10:|
00000090  20 4f 70 63 6f 64 65 73  20 61 6e 64 20 45 72 72  | Opcodes and Err|
000000a0  6f 72 20 4d 65 73 73 61  67 65 73 0d 0d 54 77 6f  |or Messages..Two|
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*
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00001a30  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 5f 5f  |________________|
*
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00001d00  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 5f 5f  |________________|
*
00001d20  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 0d 0d  |______________..|
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00002030  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 5f 5f  |________________|
*
00002060  5f 0d 0d 47 72 6f 75 70  20 36 3a 20 20 42 72 61  |_..Group 6:  Bra|
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000023e0  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 5f 5f  |________________|
*
00002410  5f 5f 5f 5f 0d 0d 47 72  6f 75 70 20 37 3a 20 20  |____..Group 7:  |
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00002450  2d 20 52 65 74 75 72 6e  20 66 72 6f 6d 20 61 20  |- Return from a |
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00002470  2d 20 4a 75 6d 70 20 74  6f 20 61 20 6e 65 77 20  |- Jump to a new |
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00002650  0d 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 5f 5f  |._______________|
00002660  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 5f 5f  |________________|
*
00002680  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 0d 0d 47  |_____________..G|
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00002960  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 5f 5f  |________________|
*
00002990  5f 5f 0d 0d 47 72 6f 75  70 20 39 3a 20 20 53 65  |__..Group 9:  Se|
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00002b50  5f 5f 5f 5f 5f 5f 5f 5f  5f 5f 5f 5f 5f 5f 5f 5f  |________________|
*
00002b80  5f 5f 5f 5f 5f 0d 0d 47  72 6f 75 70 20 31 30 3a  |_____..Group 10:|
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00003540  20 45 51 55 53 20 22 59  6f 75 20 68 61 76 65 20  | EQUS "You have |
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00003560  69 6e 67 20 73 69 6c 6c  79 2e 22 0d 20 20 20 20  |ing silly.".    |
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00003650  4b 2e 20 20 49 6e 20 74  68 69 73 20 65 78 61 6d  |K.  In this exam|
00003660  70 6c 65 20 49 0d 68 61  76 65 20 67 69 76 65 6e  |ple I.have given|
00003670  20 74 68 65 20 6e 75 6d  62 65 72 20 32 35 35 2e  | the number 255.|
00003680  20 20 54 68 69 73 20 69  73 20 74 68 65 6e 20 66  |  This is then f|
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000036b0  75 74 69 6e 65 20 77 69  6c 6c 20 70 72 69 6e 74  |utine will print|
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00003770  20 20 54 6f 20 63 6f 75  6e 74 65 72 20 74 68 69  |  To counter thi|
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000037e0  74 68 65 6e 20 70 6f 69  6e 74 20 74 68 65 20 63  |then point the c|
000037f0  6f 64 65 20 74 68 65 72  65 2e 20 20 49 27 6c 6c  |ode there.  I'll|
00003800  20 64 65 61 6c 20 77 69  74 68 20 74 68 69 73 20  | deal with this |
00003810  69 6e 20 6d 6f 72 65 0d  64 65 74 61 69 6c 20 77  |in more.detail w|
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00003870  20 66 6f 72 20 74 68 65  20 6d 6f 6d 65 6e 74 2e  | for the moment.|
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000038e0  75 20 70 72 65 73 73 20  61 20 6b 65 79 20 61 6e  |u press a key an|
000038f0  64 20 69 66 20 79 6f 75  0d 70 72 65 73 73 20 61  |d if you.press a|
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00003920  62 75 74 20 69 66 20 79  6f 75 20 70 72 65 73 73  |but if you press|
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00003940  6e 20 65 72 72 6f 72 20  69 73 20 67 65 6e 65 72  |n error is gener|
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00003960  67 65 20 69 73 20 70 72  69 6e 74 65 64 0d 6f 75  |ge is printed.ou|
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00003990  74 20 6f 66 20 63 6f 64  65 20 74 68 61 74 20 64  |t of code that d|
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00003a00  49 66 20 79 6f 75 20 63  61 6e 20 63 61 6c 6c 20  |If you can call |
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00003a60  73 2e 20 20 49 66 20 79  6f 75 20 68 61 76 65 20  |s.  If you have |
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00003a80  6f 63 65 73 73 6f 72 20  6f 72 20 61 20 4d 41 53  |ocessor or a MAS|
00003a90  54 45 52 20 74 68 65 20  65 61 73 69 65 73 74 20  |TER the easiest |
00003aa0  77 61 79 20 74 6f 20 64  6f 20 73 6f 0d 69 73 20  |way to do so.is |
00003ab0  75 73 69 6e 67 20 74 68  65 20 4f 53 20 63 6f 6d  |using the OS com|
00003ac0  6d 61 6e 64 20 2a 47 4f  20 6e 6e 6e 6e 20 77 68  |mand *GO nnnn wh|
00003ad0  65 72 65 20 6e 6e 6e 6e  20 69 73 20 74 68 65 20  |ere nnnn is the |
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00003af0  6e 20 48 45 58 2e 0d 0d  54 68 65 20 6e 65 78 74  |n HEX...The next|
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00003b70  20 20 54 68 65 73 65 20  77 69 6c 6c 20 61 6c 73  |  These will als|
00003b80  6f 20 69 6e 74 72 6f 64  75 63 65 20 6d 75 6c 74  |o introduce mult|
00003b90  69 70 6c 69 63 61 74 69  6f 6e 20 61 6e 64 0d 64  |iplication and.d|
00003ba0  69 76 69 73 69 6f 6e 20  61 6e 64 20 62 79 20 74  |ivision and by t|
00003bb0  68 65 20 65 6e 64 20 6f  66 20 74 68 65 6d 20 77  |he end of them w|
00003bc0  65 20 77 69 6c 6c 20 68  61 76 65 20 61 20 77 61  |e will have a wa|
00003bd0  79 20 6f 66 0d 69 6e 70  75 74 74 69 6e 67 20 61  |y of.inputting a|
00003be0  6e 64 20 6f 75 74 70 75  74 74 69 6e 67 20 6e 75  |nd outputting nu|
00003bf0  6d 62 65 72 73 20 6f 66  20 61 6e 79 20 73 69 7a  |mbers of any siz|
00003c00  65 20 77 69 74 68 69 6e  20 72 65 61 73 6f 6e 0d  |e within reason.|
00003c10  61 6e 64 20 6f 75 72 20  61 72 69 74 68 6d 65 74  |and our arithmet|
00003c20  69 63 61 6c 20 77 6f 72  6b 20 6f 6e 20 69 6e 74  |ical work on int|
00003c30  65 67 65 72 73 20 77 69  6c 6c 20 62 65 20 63 6f  |egers will be co|
00003c40  6d 70 6c 65 74 65 2e 0d                           |mplete..|
00003c48

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