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Docs/Opcode07
This website contains an archive of files for the Acorn Electron, BBC Micro, Acorn Archimedes, Commodore 16 and Commodore 64 computers, which Dominic Ford has rescued from his private collection of floppy disks and cassettes.
Some of these files were originally commercial releases in the 1980s and 1990s, but they are now widely available online. I assume that copyright over them is no longer being asserted. If you own the copyright and would like files to be removed, please contact me.
| Tape/disk: | Home » Archimedes archive » Archimedes World » AW-1996-08.adf » !6502DEm_6502Dem |
| Filename: | Docs/Opcode07 |
| Read OK: | ✔ |
| File size: | 082A bytes |
| Load address: | 0000 |
| Exec address: | 0000 |
Duplicates
There is 1 duplicate copy of this file in the archive:
- Archimedes archive » Zipped Apps » 6502em » !6502Em/Docs/Opcode07
- Archimedes archive » Archimedes World » AW-1996-08.adf » !6502DEm_6502Dem » Docs/Opcode07
File contents
6502Em: Opcode07
================
An interface has been added to allow 6502 paged ROM images to be developed
which make access to RISC OS SWIs. The SWI is called by executing a
previously undefined 6502 opcode.
NB This will not work in the main memory, only in a paged ROM
NB2 This is the same protocol that !65Host uses to issue SWIs
6502 Opcode &07 - Issue SWI call
--------------------------------
in: XY (X lo-byte, Y hi-byte) points to control block (cb)
cb?0..2 = SWI number (lo..hi) (bit 17 set => return errors with V set)
cb?3 = number of registers to put back into block on exit, starting at R0
cb?4 = bit set of registers to relocate on entry to SWI
(bit n set => relocate Rn from 6502 to ARM address space)
cb?5 = bit set of registers to unrelocate on exit from SWI
(bit n set => unrelocate Rn from ARM to 6502 address space)
cb?6,7 = address (lo,hi) of error buffer (in 6502 space)
only relevant if bit 17 of SWI number set
cb?8 = length of error buffer (can be zero)
cb!9 = register R0
cb!13 = register R1
..
cb!37 = register R7
out: A,X,Y preserved
N,Z,C,V as returned by the ARM on exit from the SWI
Some or all of the register block is updated with the
values on exit (possibly relocated), as controlled by cb?3,4,5
If bit 17 of the SWI number was clear, and an error occurs, then
control will not returned to the 6502 code - instead the error
block is copied to &100 in 6502 format (ie zero byte, 1 byte error
number, followed by zero terminated error string) and then it jumps
to &100, which causes a BRK. If no error occurred, control will be
returned and V will be clear.
If bit 17 of the SWI number was set, then the X form of the SWI
is issued; if this returns with V set, then the error block is
copied into the specified error buffer in 6502 format, truncated
to the length of the error buffer (if truncated the terminating
zero will be in the last byte of the error buffer).
00000000 36 35 30 32 45 6d 3a 20 4f 70 63 6f 64 65 30 37 |6502Em: Opcode07| 00000010 0a 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d |.===============| 00000020 3d 0a 0a 41 6e 20 69 6e 74 65 72 66 61 63 65 20 |=..An interface | 00000030 68 61 73 20 62 65 65 6e 20 61 64 64 65 64 20 74 |has been added t| 00000040 6f 20 61 6c 6c 6f 77 20 36 35 30 32 20 70 61 67 |o allow 6502 pag| 00000050 65 64 20 52 4f 4d 20 69 6d 61 67 65 73 20 74 6f |ed ROM images to| 00000060 20 62 65 20 64 65 76 65 6c 6f 70 65 64 0a 77 68 | be developed.wh| 00000070 69 63 68 20 6d 61 6b 65 20 61 63 63 65 73 73 20 |ich make access | 00000080 74 6f 20 52 49 53 43 20 4f 53 20 53 57 49 73 2e |to RISC OS SWIs.| 00000090 20 54 68 65 20 53 57 49 20 69 73 20 63 61 6c 6c | The SWI is call| 000000a0 65 64 20 62 79 20 65 78 65 63 75 74 69 6e 67 20 |ed by executing | 000000b0 61 0a 70 72 65 76 69 6f 75 73 6c 79 20 75 6e 64 |a.previously und| 000000c0 65 66 69 6e 65 64 20 36 35 30 32 20 6f 70 63 6f |efined 6502 opco| 000000d0 64 65 2e 0a 0a 4e 42 20 54 68 69 73 20 77 69 6c |de...NB This wil| 000000e0 6c 20 6e 6f 74 20 77 6f 72 6b 20 69 6e 20 74 68 |l not work in th| 000000f0 65 20 6d 61 69 6e 20 6d 65 6d 6f 72 79 2c 20 6f |e main memory, o| 00000100 6e 6c 79 20 69 6e 20 61 20 70 61 67 65 64 20 52 |nly in a paged R| 00000110 4f 4d 0a 0a 4e 42 32 20 54 68 69 73 20 69 73 20 |OM..NB2 This is | 00000120 74 68 65 20 73 61 6d 65 20 70 72 6f 74 6f 63 6f |the same protoco| 00000130 6c 20 74 68 61 74 20 21 36 35 48 6f 73 74 20 75 |l that !65Host u| 00000140 73 65 73 20 74 6f 20 69 73 73 75 65 20 53 57 49 |ses to issue SWI| 00000150 73 0a 0a 20 36 35 30 32 20 4f 70 63 6f 64 65 20 |s.. 6502 Opcode | 00000160 26 30 37 20 2d 20 49 73 73 75 65 20 53 57 49 20 |&07 - Issue SWI | 00000170 63 61 6c 6c 0a 20 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d |call. ----------| 00000180 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d |----------------| 00000190 2d 2d 2d 2d 2d 2d 0a 0a 69 6e 3a 20 20 20 20 20 |------..in: | 000001a0 58 59 20 28 58 20 6c 6f 2d 62 79 74 65 2c 20 59 |XY (X lo-byte, Y| 000001b0 20 68 69 2d 62 79 74 65 29 20 70 6f 69 6e 74 73 | hi-byte) points| 000001c0 20 74 6f 20 63 6f 6e 74 72 6f 6c 20 62 6c 6f 63 | to control bloc| 000001d0 6b 20 28 63 62 29 0a 0a 63 62 3f 30 2e 2e 32 20 |k (cb)..cb?0..2 | 000001e0 3d 20 53 57 49 20 6e 75 6d 62 65 72 20 28 6c 6f |= SWI number (lo| 000001f0 2e 2e 68 69 29 20 28 62 69 74 20 31 37 20 73 65 |..hi) (bit 17 se| 00000200 74 20 3d 3e 20 72 65 74 75 72 6e 20 65 72 72 6f |t => return erro| 00000210 72 73 20 77 69 74 68 20 56 20 73 65 74 29 0a 0a |rs with V set)..| 00000220 63 62 3f 33 20 20 20 20 3d 20 6e 75 6d 62 65 72 |cb?3 = number| 00000230 20 6f 66 20 72 65 67 69 73 74 65 72 73 20 74 6f | of registers to| 00000240 20 70 75 74 20 62 61 63 6b 20 69 6e 74 6f 20 62 | put back into b| 00000250 6c 6f 63 6b 20 6f 6e 20 65 78 69 74 2c 20 73 74 |lock on exit, st| 00000260 61 72 74 69 6e 67 20 61 74 20 52 30 0a 0a 63 62 |arting at R0..cb| 00000270 3f 34 20 20 20 20 3d 20 62 69 74 20 73 65 74 20 |?4 = bit set | 00000280 6f 66 20 72 65 67 69 73 74 65 72 73 20 74 6f 20 |of registers to | 00000290 72 65 6c 6f 63 61 74 65 20 6f 6e 20 65 6e 74 72 |relocate on entr| 000002a0 79 20 74 6f 20 53 57 49 0a 20 20 20 20 20 20 20 |y to SWI. | 000002b0 20 20 20 28 62 69 74 20 6e 20 73 65 74 20 3d 3e | (bit n set =>| 000002c0 20 72 65 6c 6f 63 61 74 65 20 52 6e 20 66 72 6f | relocate Rn fro| 000002d0 6d 20 36 35 30 32 20 74 6f 20 41 52 4d 20 61 64 |m 6502 to ARM ad| 000002e0 64 72 65 73 73 20 73 70 61 63 65 29 0a 0a 63 62 |dress space)..cb| 000002f0 3f 35 20 20 20 20 3d 20 62 69 74 20 73 65 74 20 |?5 = bit set | 00000300 6f 66 20 72 65 67 69 73 74 65 72 73 20 74 6f 20 |of registers to | 00000310 75 6e 72 65 6c 6f 63 61 74 65 20 6f 6e 20 65 78 |unrelocate on ex| 00000320 69 74 20 66 72 6f 6d 20 53 57 49 0a 20 20 20 20 |it from SWI. | 00000330 20 20 20 20 20 20 28 62 69 74 20 6e 20 73 65 74 | (bit n set| 00000340 20 3d 3e 20 75 6e 72 65 6c 6f 63 61 74 65 20 52 | => unrelocate R| 00000350 6e 20 66 72 6f 6d 20 41 52 4d 20 74 6f 20 36 35 |n from ARM to 65| 00000360 30 32 20 61 64 64 72 65 73 73 20 73 70 61 63 65 |02 address space| 00000370 29 0a 0a 63 62 3f 36 2c 37 20 20 3d 20 61 64 64 |)..cb?6,7 = add| 00000380 72 65 73 73 20 28 6c 6f 2c 68 69 29 20 6f 66 20 |ress (lo,hi) of | 00000390 65 72 72 6f 72 20 62 75 66 66 65 72 20 28 69 6e |error buffer (in| 000003a0 20 36 35 30 32 20 73 70 61 63 65 29 0a 20 20 20 | 6502 space). | 000003b0 20 20 20 20 20 20 20 6f 6e 6c 79 20 72 65 6c 65 | only rele| 000003c0 76 61 6e 74 20 69 66 20 62 69 74 20 31 37 20 6f |vant if bit 17 o| 000003d0 66 20 53 57 49 20 6e 75 6d 62 65 72 20 73 65 74 |f SWI number set| 000003e0 0a 0a 63 62 3f 38 20 20 20 20 3d 20 6c 65 6e 67 |..cb?8 = leng| 000003f0 74 68 20 6f 66 20 65 72 72 6f 72 20 62 75 66 66 |th of error buff| 00000400 65 72 20 28 63 61 6e 20 62 65 20 7a 65 72 6f 29 |er (can be zero)| 00000410 0a 0a 63 62 21 39 20 20 20 20 3d 20 72 65 67 69 |..cb!9 = regi| 00000420 73 74 65 72 20 52 30 0a 0a 63 62 21 31 33 20 20 |ster R0..cb!13 | 00000430 20 3d 20 72 65 67 69 73 74 65 72 20 52 31 0a 0a | = register R1..| 00000440 2e 2e 0a 0a 63 62 21 33 37 20 20 20 3d 20 72 65 |....cb!37 = re| 00000450 67 69 73 74 65 72 20 52 37 0a 0a 6f 75 74 3a 20 |gister R7..out: | 00000460 20 20 20 41 2c 58 2c 59 20 70 72 65 73 65 72 76 | A,X,Y preserv| 00000470 65 64 0a 20 20 20 20 20 20 20 20 4e 2c 5a 2c 43 |ed. N,Z,C| 00000480 2c 56 20 61 73 20 72 65 74 75 72 6e 65 64 20 62 |,V as returned b| 00000490 79 20 74 68 65 20 41 52 4d 20 6f 6e 20 65 78 69 |y the ARM on exi| 000004a0 74 20 66 72 6f 6d 20 74 68 65 20 53 57 49 0a 20 |t from the SWI. | 000004b0 20 20 20 20 20 20 20 53 6f 6d 65 20 6f 72 20 61 | Some or a| 000004c0 6c 6c 20 6f 66 20 74 68 65 20 72 65 67 69 73 74 |ll of the regist| 000004d0 65 72 20 62 6c 6f 63 6b 20 69 73 20 75 70 64 61 |er block is upda| 000004e0 74 65 64 20 77 69 74 68 20 74 68 65 0a 20 20 20 |ted with the. | 000004f0 20 20 20 20 20 76 61 6c 75 65 73 20 6f 6e 20 65 | values on e| 00000500 78 69 74 20 28 70 6f 73 73 69 62 6c 79 20 72 65 |xit (possibly re| 00000510 6c 6f 63 61 74 65 64 29 2c 20 61 73 20 63 6f 6e |located), as con| 00000520 74 72 6f 6c 6c 65 64 20 62 79 20 63 62 3f 33 2c |trolled by cb?3,| 00000530 34 2c 35 0a 0a 20 20 20 20 20 20 20 20 49 66 20 |4,5.. If | 00000540 62 69 74 20 31 37 20 6f 66 20 74 68 65 20 53 57 |bit 17 of the SW| 00000550 49 20 6e 75 6d 62 65 72 20 77 61 73 20 63 6c 65 |I number was cle| 00000560 61 72 2c 20 61 6e 64 20 61 6e 20 65 72 72 6f 72 |ar, and an error| 00000570 20 6f 63 63 75 72 73 2c 20 74 68 65 6e 0a 20 20 | occurs, then. | 00000580 20 20 20 20 20 20 63 6f 6e 74 72 6f 6c 20 77 69 | control wi| 00000590 6c 6c 20 6e 6f 74 20 72 65 74 75 72 6e 65 64 20 |ll not returned | 000005a0 74 6f 20 74 68 65 20 36 35 30 32 20 63 6f 64 65 |to the 6502 code| 000005b0 20 2d 20 69 6e 73 74 65 61 64 20 74 68 65 20 65 | - instead the e| 000005c0 72 72 6f 72 0a 20 20 20 20 20 20 20 20 62 6c 6f |rror. blo| 000005d0 63 6b 20 69 73 20 63 6f 70 69 65 64 20 74 6f 20 |ck is copied to | 000005e0 26 31 30 30 20 69 6e 20 36 35 30 32 20 66 6f 72 |&100 in 6502 for| 000005f0 6d 61 74 20 28 69 65 20 7a 65 72 6f 20 62 79 74 |mat (ie zero byt| 00000600 65 2c 20 31 20 62 79 74 65 20 65 72 72 6f 72 0a |e, 1 byte error.| 00000610 20 20 20 20 20 20 20 20 6e 75 6d 62 65 72 2c 20 | number, | 00000620 66 6f 6c 6c 6f 77 65 64 20 62 79 20 7a 65 72 6f |followed by zero| 00000630 20 74 65 72 6d 69 6e 61 74 65 64 20 65 72 72 6f | terminated erro| 00000640 72 20 73 74 72 69 6e 67 29 20 61 6e 64 20 74 68 |r string) and th| 00000650 65 6e 20 69 74 20 6a 75 6d 70 73 0a 20 20 20 20 |en it jumps. | 00000660 20 20 20 20 74 6f 20 26 31 30 30 2c 20 77 68 69 | to &100, whi| 00000670 63 68 20 63 61 75 73 65 73 20 61 20 42 52 4b 2e |ch causes a BRK.| 00000680 20 49 66 20 6e 6f 20 65 72 72 6f 72 20 6f 63 63 | If no error occ| 00000690 75 72 72 65 64 2c 20 63 6f 6e 74 72 6f 6c 20 77 |urred, control w| 000006a0 69 6c 6c 20 62 65 0a 20 20 20 20 20 20 20 20 72 |ill be. r| 000006b0 65 74 75 72 6e 65 64 20 61 6e 64 20 56 20 77 69 |eturned and V wi| 000006c0 6c 6c 20 62 65 20 63 6c 65 61 72 2e 0a 0a 20 20 |ll be clear... | 000006d0 20 20 20 20 20 20 49 66 20 62 69 74 20 31 37 20 | If bit 17 | 000006e0 6f 66 20 74 68 65 20 53 57 49 20 6e 75 6d 62 65 |of the SWI numbe| 000006f0 72 20 77 61 73 20 73 65 74 2c 20 74 68 65 6e 20 |r was set, then | 00000700 74 68 65 20 58 20 66 6f 72 6d 20 6f 66 20 74 68 |the X form of th| 00000710 65 20 53 57 49 0a 20 20 20 20 20 20 20 20 69 73 |e SWI. is| 00000720 20 69 73 73 75 65 64 3b 20 69 66 20 74 68 69 73 | issued; if this| 00000730 20 72 65 74 75 72 6e 73 20 77 69 74 68 20 56 20 | returns with V | 00000740 73 65 74 2c 20 74 68 65 6e 20 74 68 65 20 65 72 |set, then the er| 00000750 72 6f 72 20 62 6c 6f 63 6b 20 69 73 0a 20 20 20 |ror block is. | 00000760 20 20 20 20 20 63 6f 70 69 65 64 20 69 6e 74 6f | copied into| 00000770 20 74 68 65 20 73 70 65 63 69 66 69 65 64 20 65 | the specified e| 00000780 72 72 6f 72 20 62 75 66 66 65 72 20 69 6e 20 36 |rror buffer in 6| 00000790 35 30 32 20 66 6f 72 6d 61 74 2c 20 74 72 75 6e |502 format, trun| 000007a0 63 61 74 65 64 0a 20 20 20 20 20 20 20 20 74 6f |cated. to| 000007b0 20 74 68 65 20 6c 65 6e 67 74 68 20 6f 66 20 74 | the length of t| 000007c0 68 65 20 65 72 72 6f 72 20 62 75 66 66 65 72 20 |he error buffer | 000007d0 28 69 66 20 74 72 75 6e 63 61 74 65 64 20 74 68 |(if truncated th| 000007e0 65 20 74 65 72 6d 69 6e 61 74 69 6e 67 0a 20 20 |e terminating. | 000007f0 20 20 20 20 20 20 7a 65 72 6f 20 77 69 6c 6c 20 | zero will | 00000800 62 65 20 69 6e 20 74 68 65 20 6c 61 73 74 20 62 |be in the last b| 00000810 79 74 65 20 6f 66 20 74 68 65 20 65 72 72 6f 72 |yte of the error| 00000820 20 62 75 66 66 65 72 29 2e 0a | buffer)..| 0000082a
.