�> NEWKEYS
*� mcode &200 :�: machine code at mcode
7savereg=&FC :�: interrupt accumulator save register
(+irq1v=&204 :�: primary interrupt vector
2,bytev=&20A :�: Osbyte indirection vector
<!drb=&FE60 :�: data register B
F,ddrb=&FE62 :�: data direction register B
P-pcr=&FE6C :�: peripheral control register
Z)ifr=&FE6D :�: interrupt flag register
d+ier=&FE6E :�: interrupt enable register
n� pass=0 � 2 � 2
xP%=mcode
�
[OPT pass
�:LDX irq1v \ current primary interrupt vector, low byte
�=LDY irq1v+1 \ current primary interrupt vector, high byte
�,CPY #interrupt � 256 \ compare high byte
�5BEQ disable \ restore old vector if irq1v altered
�6STX oldirq1v \ save original irq1 vector, low byte
�9STY oldirq1v+1 \ save original irq1 vector, high byte
�3LDX bytev \ Osbyte indirection vector, low byte
�6LDY bytev+1 \ Osbyte indirection vector, high byte
�8STX oldbytev \ save original Osbyte vector, low byte
�;STY oldbytev+1 \ save original Osbyte vector, high byte
�4LDX #interrupt � 256 \ new irq1 vector, low byte
�5LDY #interrupt � 256 \ new irq1 vector, high byte

$SEI \ set interrupt disable flag

+STX irq1v \ alter irq1 vector, low byte

.STY irq1v+1 \ alter irq1 vector, high byte

"&CLI \ clear interrupt disable flag

,5LDX #newinkey � 256 \ new Osbyte vector, low byte

66LDY #newinkey � 256 \ new Osbyte vector, high byte

@-STX bytev \ alter Osbyte vector, low byte

J0STY bytev+1 \ alter Osbyte vector, high byte

T*LDA #&98 \ %10011000, ie. enable CB1/2

^'STA ier \ interrupt enable register

h)LDA pcr \ peripheral control register

r0� #&0F \ � with %00001111, ie clear bits 4-7

|4�A #&50 \ � with %01010000, ie. set bits 4 and 6

�BSTA pcr \ interrupt on +ve transition, CB2 input, DRB to clear

�LDA #&00 \ user port input

�(STA ddrb \ data direction register B

�RTS \ return to BASIC

�.disable

�;LDA #&18 \ %00011000 ready to clear bits 3 and 4 of ier

�1LDX oldirq1v \ original irq1 vector, low byte

�4LDY oldirq1v+1 \ original irq1 vector, high byte

�$SEI \ set interrupt disable flag

�'STA ier \ interrupt enable register

�)LDA pcr \ peripheral control register

�� #&0F \ clear bits 4-7

�)STA pcr \ peripheral control register
-STX irq1v \ restore irq1 vector, low byte
0STY irq1v+1 \ restore irq1 vector, high byte
&CLI \ clear interrupt disable flag
&3LDX oldbytev \ original Osbyte vector, low byte
06LDY oldbytev+1 \ original Osbyte vector, high byte
:/STX bytev \ restore Osbyte vector, low byte
D2STY bytev+1 \ restore Osbyte vector, high byte
NRTS \ return to BASIC
X.interrupt
b5LDA savereg \ interrupt accumulator save register
l"PHA \ and push it on the stack
v%LDA ifr \ interrupt flag register
�1BPL notuser \ bit 7 is set if VIA-B interrupt
�4� #&18 \ � with %00011000, ie. test bits 3 and 4
�(BEQ notuser \ exit if not CB1 or CB2
�+� #&10 \ � with %00010000, ie. test CB1
�6BNE xpulse \ bit 4 set for an X direction movement
�/LDA drb \ Y direction, load data register B
�-� #&04 \ � with %00000100, ie. test bit 2
�4BNE ydown \ if bit 2 is set then Y is going down
�8INC ycoord \ Y is going up so increment Y coordinate
�.BNE exit \ branch if in the range 1 to 255
�(BEQ decy \ if zero then alter to 255
�
.ydown
�"LDA ycoord \ load Y coordinate
;BEQ exit \ branch if zero because it can't go any lower
	.decy
)DEC ycoord \ reduce Y coordinate by 1
 BJMP exit \ restore interrupt accumulator save register and RTI
*.xpulse
4#LDA drb \ load input register B
>ROR A \ bit 0 into carry
H/BCS xdown \ X is going down if bit 0 is set
R0INC xcoord \ X is going up if bit 0 is clear
\ABNE exit \ exit if X coordinate is in the range from 1 to 255
f3BEQ decx \ if X coordinate = 0 then make it 255
p
.xdown
z"LDA xcoord \ load X coordinate
�2BEQ exit \ if it is zero it can't go any lower
�	.decx
�+DEC xcoord \ decrease X coordinate by 1
�	.exit
�@PLA \ pull interrupt accumulator save register off the stack
�'STA savereg \ and restore zero page
�RTI \ return from interrupt
�.notuser
�DPLA \ pull the interrupt accumulator save register off the stack
�/STA savereg \ restore the zero page address
�1JMP (oldirq1v) \ exit via the original vector
�
.newinkey
�)PHP \ push status register onto stack
"CMP #&81 \ is this Osbyte &81?
7BNE notinkey \ if not then exit via original vector
CPY #&FF \ is this a -ve �?
$5BEQ inkey \ if it is then branch to new � routine
.
.notinkey
8,PLP \ pull status register off the stack
B.oldcode
L<JMP (oldbytev) \ and exit via the original Osbyte vector
V
.inkey
`$TXA \ � number in the X register
j"PHA \ push � number onto stack
tLDA #&81 \ Osbyte &81
~1JSR oldcode \ perform the original � function
�5CPX #&FF \ X = &FF if the required key is pressed
�EBNE notpressed \ if required key not pressed then check the mouse
�!PLA \ pull � number off stack
�.pullout
�LDA #&81 \ Osbyte &81
�,PLP \ pull status register off the stack
�RTS \ and return to BASIC
�.notpressed
�!PLA \ pull � number off stack
�3CMP up \ are you looking for the cursor up key?
�/BNE trydown \ if not then check cursor down
�(LDA ycoord \ Y coordinate from mouse
:CMP #&88 \ if greater than &87 then simulate key press

>BCC pullout \ if less than &88 then exit without key press
#BCS resety \ simulate key press
.trydown
(7CMP down \ are you looking for the cursor down key?
20BNE isitleft \ if not then check cursor left
<(LDA ycoord \ Y coordinate from mouse
F7CMP #&78 \ if less than &78 then simulate key press
PABCS pullout \ if greater than &77 then exit without key press
Z.resety
d(LDA #&80 \ reset Y coordinate to &80
nSTA ycoord
x:BNE found \ unconditional branch to simulate key press
�
.isitleft
�3CMP left \ are you looking for cursor left key?
�2BNE isitright \ if not then check cursor right
�(LDA xcoord \ X coordinate from mouse
�7CMP #&78 \ if less than &78 then simulate key press
�ABCS pullout \ if greater than &77 then exit without key press
�9BCC resetx \ if less than &78 then simulate key press
�.isitright
�5CMP right \ are you looking for cursor right key?
�<BNE trybuttons \ if not then check 3 other possible keys
�(LDA xcoord \ X coordinate from mouse
�:CMP #&88 \ if greater than &87 then simulate key press
�>BCC pullout \ if less than &88 then exit without key press
.resetx
*LDA #&80 \ restore X coordinate to &80
STA xcoord
":BNE found \ unconditional branch to simulate key press
,.trybuttons
6:CMP centrebutton \ is it the first of 3 possible keys?
@1BNE tryright \ if not then try the second key
J#LDA drb \ load input register B
T3JMP two \ check for mouse centre button pressed
^
.tryright
h:CMP rightbutton \ is it the second of 3 possible keys?
r/BNE tryleft \ if not then try the third key
|#LDA drb \ load input register B
�2JMP one \ check for mouse right button pressed
�.tryleft
�;CMP leftbutton \ is it the third of 3 possible buttons?
�>BNE pullout \ if not then exit without simulated key press
�#LDA drb \ load input register B
�	ROL A
�.two
�	ROL A
�.one
�	ROL A
�DBCS pullout \ exit without key press if mouse button not pressed
�
.found
�LDA #&81 \ Osbyte &81
LDX #&FF \ key pressed
LDY #&FF \ key pressed
,PLP \ pull status register off the stack
&RTS \ return to BASIC
0.rightbutton
:EQUB -90 \ delete
D.centrebutton
NEQUB -74 \ return
X.leftbutton
bEQUB -106 \ copy
l.up
vEQUB -58 \ cursor up
�	.down
�EQUB -42 \ cursor down
�	.left
�EQUB -26 \ cursor left
�
.right
�EQUB -122 \ cursor right
�
.oldirq1v
�#EQUW &00 \ original irq1 vector
�
.oldbytev
�%EQUW &00 \ original Osbyte vector
�.xcoord
�.H%
�'EQUB &80 \ mouse X coordinate 0-255
.ycoord
.V%
'EQUB &80 \ mouse Y coordinate 0-255
 
.lastbyte
*]
4�
>� mcode :�: enable new code
H�7
RHmouse$=�141+�132+�157+�131+"Press keyboard or move the mouse  "+�156
\�0,1)mouse$
f�0,2)mouse$
p-�10,7)"Bytes used = &";~(lastbyte-mcode)
z� � � �d|H
��23,1,0;0;0;0;
��
��10,11)"X = &";~?H%;" "
��20,11)"Y = &";~?V%;" "
�-� �(-106) �10,15)"Copy" � �10,15)"    "
�0� �(-74) �15,15)"Return" � �15,15)"      "
�0� �(-90) �22,15)"Delete" � �22,15)"      "
�(� �(-58) �17,18)"Up" � �17,18)"  "
�,� �(-42) �16,22)"Down" � �16,22)"    "
�,� �(-26) �10,20)"Left" � �10,20)"    "
�/� �(-122) �22,20)"Right" � �22,20)"     "
�� �
� � mcode :�: disable new code
	�23,1,1;0;0;0;31,0,23
	�
�

00000000  0d 00 0a 0e f4 3e 20 4e  45 57 4b 45 59 53 0d 00  |.....> NEWKEYS..|
00000010  14 2a de 20 6d 63 6f 64  65 20 26 32 30 30 20 3a  |.*. mcode &200 :|
00000020  f4 3a 20 6d 61 63 68 69  6e 65 20 63 6f 64 65 20  |.: machine code |
00000030  61 74 20 6d 63 6f 64 65  0d 00 1e 37 73 61 76 65  |at mcode...7save|
00000040  72 65 67 3d 26 46 43 20  3a f4 3a 20 69 6e 74 65  |reg=&FC :.: inte|
00000050  72 72 75 70 74 20 61 63  63 75 6d 75 6c 61 74 6f  |rrupt accumulato|
00000060  72 20 73 61 76 65 20 72  65 67 69 73 74 65 72 0d  |r save register.|
00000070  00 28 2b 69 72 71 31 76  3d 26 32 30 34 20 3a f4  |.(+irq1v=&204 :.|
00000080  3a 20 70 72 69 6d 61 72  79 20 69 6e 74 65 72 72  |: primary interr|
00000090  75 70 74 20 76 65 63 74  6f 72 0d 00 32 2c 62 79  |upt vector..2,by|
000000a0  74 65 76 3d 26 32 30 41  20 3a f4 3a 20 4f 73 62  |tev=&20A :.: Osb|
000000b0  79 74 65 20 69 6e 64 69  72 65 63 74 69 6f 6e 20  |yte indirection |
000000c0  76 65 63 74 6f 72 0d 00  3c 21 64 72 62 3d 26 46  |vector..<!drb=&F|
000000d0  45 36 30 20 3a f4 3a 20  64 61 74 61 20 72 65 67  |E60 :.: data reg|
000000e0  69 73 74 65 72 20 42 0d  00 46 2c 64 64 72 62 3d  |ister B..F,ddrb=|
000000f0  26 46 45 36 32 20 3a f4  3a 20 64 61 74 61 20 64  |&FE62 :.: data d|
00000100  69 72 65 63 74 69 6f 6e  20 72 65 67 69 73 74 65  |irection registe|
00000110  72 20 42 0d 00 50 2d 70  63 72 3d 26 46 45 36 43  |r B..P-pcr=&FE6C|
00000120  20 3a f4 3a 20 70 65 72  69 70 68 65 72 61 6c 20  | :.: peripheral |
00000130  63 6f 6e 74 72 6f 6c 20  72 65 67 69 73 74 65 72  |control register|
00000140  0d 00 5a 29 69 66 72 3d  26 46 45 36 44 20 3a f4  |..Z)ifr=&FE6D :.|
00000150  3a 20 69 6e 74 65 72 72  75 70 74 20 66 6c 61 67  |: interrupt flag|
00000160  20 72 65 67 69 73 74 65  72 0d 00 64 2b 69 65 72  | register..d+ier|
00000170  3d 26 46 45 36 45 20 3a  f4 3a 20 69 6e 74 65 72  |=&FE6E :.: inter|
00000180  72 75 70 74 20 65 6e 61  62 6c 65 20 72 65 67 69  |rupt enable regi|
00000190  73 74 65 72 0d 00 6e 14  e3 20 70 61 73 73 3d 30  |ster..n.. pass=0|
000001a0  20 b8 20 32 20 88 20 32  0d 00 78 0c 50 25 3d 6d  | . 2 . 2..x.P%=m|
000001b0  63 6f 64 65 0d 00 82 0d  5b 4f 50 54 20 70 61 73  |code....[OPT pas|
000001c0  73 0d 00 8c 3a 4c 44 58  20 69 72 71 31 76 20 5c  |s...:LDX irq1v \|
000001d0  20 63 75 72 72 65 6e 74  20 70 72 69 6d 61 72 79  | current primary|
000001e0  20 69 6e 74 65 72 72 75  70 74 20 76 65 63 74 6f  | interrupt vecto|
000001f0  72 2c 20 6c 6f 77 20 62  79 74 65 0d 00 96 3d 4c  |r, low byte...=L|
00000200  44 59 20 69 72 71 31 76  2b 31 20 5c 20 63 75 72  |DY irq1v+1 \ cur|
00000210  72 65 6e 74 20 70 72 69  6d 61 72 79 20 69 6e 74  |rent primary int|
00000220  65 72 72 75 70 74 20 76  65 63 74 6f 72 2c 20 68  |errupt vector, h|
00000230  69 67 68 20 62 79 74 65  0d 00 a0 2c 43 50 59 20  |igh byte...,CPY |
00000240  23 69 6e 74 65 72 72 75  70 74 20 81 20 32 35 36  |#interrupt . 256|
00000250  20 5c 20 63 6f 6d 70 61  72 65 20 68 69 67 68 20  | \ compare high |
00000260  62 79 74 65 0d 00 aa 35  42 45 51 20 64 69 73 61  |byte...5BEQ disa|
00000270  62 6c 65 20 5c 20 72 65  73 74 6f 72 65 20 6f 6c  |ble \ restore ol|
00000280  64 20 76 65 63 74 6f 72  20 69 66 20 69 72 71 31  |d vector if irq1|
00000290  76 20 61 6c 74 65 72 65  64 0d 00 b4 36 53 54 58  |v altered...6STX|
000002a0  20 6f 6c 64 69 72 71 31  76 20 5c 20 73 61 76 65  | oldirq1v \ save|
000002b0  20 6f 72 69 67 69 6e 61  6c 20 69 72 71 31 20 76  | original irq1 v|
000002c0  65 63 74 6f 72 2c 20 6c  6f 77 20 62 79 74 65 0d  |ector, low byte.|
000002d0  00 be 39 53 54 59 20 6f  6c 64 69 72 71 31 76 2b  |..9STY oldirq1v+|
000002e0  31 20 5c 20 73 61 76 65  20 6f 72 69 67 69 6e 61  |1 \ save origina|
000002f0  6c 20 69 72 71 31 20 76  65 63 74 6f 72 2c 20 68  |l irq1 vector, h|
00000300  69 67 68 20 62 79 74 65  0d 00 c8 33 4c 44 58 20  |igh byte...3LDX |
00000310  62 79 74 65 76 20 5c 20  4f 73 62 79 74 65 20 69  |bytev \ Osbyte i|
00000320  6e 64 69 72 65 63 74 69  6f 6e 20 76 65 63 74 6f  |ndirection vecto|
00000330  72 2c 20 6c 6f 77 20 62  79 74 65 0d 00 d2 36 4c  |r, low byte...6L|
00000340  44 59 20 62 79 74 65 76  2b 31 20 5c 20 4f 73 62  |DY bytev+1 \ Osb|
00000350  79 74 65 20 69 6e 64 69  72 65 63 74 69 6f 6e 20  |yte indirection |
00000360  76 65 63 74 6f 72 2c 20  68 69 67 68 20 62 79 74  |vector, high byt|
00000370  65 0d 00 dc 38 53 54 58  20 6f 6c 64 62 79 74 65  |e...8STX oldbyte|
00000380  76 20 5c 20 73 61 76 65  20 6f 72 69 67 69 6e 61  |v \ save origina|
00000390  6c 20 4f 73 62 79 74 65  20 76 65 63 74 6f 72 2c  |l Osbyte vector,|
000003a0  20 6c 6f 77 20 62 79 74  65 0d 00 e6 3b 53 54 59  | low byte...;STY|
000003b0  20 6f 6c 64 62 79 74 65  76 2b 31 20 5c 20 73 61  | oldbytev+1 \ sa|
000003c0  76 65 20 6f 72 69 67 69  6e 61 6c 20 4f 73 62 79  |ve original Osby|
000003d0  74 65 20 76 65 63 74 6f  72 2c 20 68 69 67 68 20  |te vector, high |
000003e0  62 79 74 65 0d 00 f0 34  4c 44 58 20 23 69 6e 74  |byte...4LDX #int|
000003f0  65 72 72 75 70 74 20 83  20 32 35 36 20 5c 20 6e  |errupt . 256 \ n|
00000400  65 77 20 69 72 71 31 20  76 65 63 74 6f 72 2c 20  |ew irq1 vector, |
00000410  6c 6f 77 20 62 79 74 65  0d 00 fa 35 4c 44 59 20  |low byte...5LDY |
00000420  23 69 6e 74 65 72 72 75  70 74 20 81 20 32 35 36  |#interrupt . 256|
00000430  20 5c 20 6e 65 77 20 69  72 71 31 20 76 65 63 74  | \ new irq1 vect|
00000440  6f 72 2c 20 68 69 67 68  20 62 79 74 65 0d 01 04  |or, high byte...|
00000450  24 53 45 49 20 5c 20 73  65 74 20 69 6e 74 65 72  |$SEI \ set inter|
00000460  72 75 70 74 20 64 69 73  61 62 6c 65 20 66 6c 61  |rupt disable fla|
00000470  67 0d 01 0e 2b 53 54 58  20 69 72 71 31 76 20 5c  |g...+STX irq1v \|
00000480  20 61 6c 74 65 72 20 69  72 71 31 20 76 65 63 74  | alter irq1 vect|
00000490  6f 72 2c 20 6c 6f 77 20  62 79 74 65 0d 01 18 2e  |or, low byte....|
000004a0  53 54 59 20 69 72 71 31  76 2b 31 20 5c 20 61 6c  |STY irq1v+1 \ al|
000004b0  74 65 72 20 69 72 71 31  20 76 65 63 74 6f 72 2c  |ter irq1 vector,|
000004c0  20 68 69 67 68 20 62 79  74 65 0d 01 22 26 43 4c  | high byte.."&CL|
000004d0  49 20 5c 20 63 6c 65 61  72 20 69 6e 74 65 72 72  |I \ clear interr|
000004e0  75 70 74 20 64 69 73 61  62 6c 65 20 66 6c 61 67  |upt disable flag|
000004f0  0d 01 2c 35 4c 44 58 20  23 6e 65 77 69 6e 6b 65  |..,5LDX #newinke|
00000500  79 20 83 20 32 35 36 20  5c 20 6e 65 77 20 4f 73  |y . 256 \ new Os|
00000510  62 79 74 65 20 76 65 63  74 6f 72 2c 20 6c 6f 77  |byte vector, low|
00000520  20 62 79 74 65 0d 01 36  36 4c 44 59 20 23 6e 65  | byte..66LDY #ne|
00000530  77 69 6e 6b 65 79 20 81  20 32 35 36 20 5c 20 6e  |winkey . 256 \ n|
00000540  65 77 20 4f 73 62 79 74  65 20 76 65 63 74 6f 72  |ew Osbyte vector|
00000550  2c 20 68 69 67 68 20 62  79 74 65 0d 01 40 2d 53  |, high byte..@-S|
00000560  54 58 20 62 79 74 65 76  20 5c 20 61 6c 74 65 72  |TX bytev \ alter|
00000570  20 4f 73 62 79 74 65 20  76 65 63 74 6f 72 2c 20  | Osbyte vector, |
00000580  6c 6f 77 20 62 79 74 65  0d 01 4a 30 53 54 59 20  |low byte..J0STY |
00000590  62 79 74 65 76 2b 31 20  5c 20 61 6c 74 65 72 20  |bytev+1 \ alter |
000005a0  4f 73 62 79 74 65 20 76  65 63 74 6f 72 2c 20 68  |Osbyte vector, h|
000005b0  69 67 68 20 62 79 74 65  0d 01 54 2a 4c 44 41 20  |igh byte..T*LDA |
000005c0  23 26 39 38 20 5c 20 25  31 30 30 31 31 30 30 30  |#&98 \ %10011000|
000005d0  2c 20 69 65 2e 20 65 6e  61 62 6c 65 20 43 42 31  |, ie. enable CB1|
000005e0  2f 32 0d 01 5e 27 53 54  41 20 69 65 72 20 5c 20  |/2..^'STA ier \ |
000005f0  69 6e 74 65 72 72 75 70  74 20 65 6e 61 62 6c 65  |interrupt enable|
00000600  20 72 65 67 69 73 74 65  72 0d 01 68 29 4c 44 41  | register..h)LDA|
00000610  20 70 63 72 20 5c 20 70  65 72 69 70 68 65 72 61  | pcr \ periphera|
00000620  6c 20 63 6f 6e 74 72 6f  6c 20 72 65 67 69 73 74  |l control regist|
00000630  65 72 0d 01 72 30 80 20  23 26 30 46 20 5c 20 80  |er..r0. #&0F \ .|
00000640  20 77 69 74 68 20 25 30  30 30 30 31 31 31 31 2c  | with %00001111,|
00000650  20 69 65 20 63 6c 65 61  72 20 62 69 74 73 20 34  | ie clear bits 4|
00000660  2d 37 0d 01 7c 34 84 41  20 23 26 35 30 20 5c 20  |-7..|4.A #&50 \ |
00000670  84 20 77 69 74 68 20 25  30 31 30 31 30 30 30 30  |. with %01010000|
00000680  2c 20 69 65 2e 20 73 65  74 20 62 69 74 73 20 34  |, ie. set bits 4|
00000690  20 61 6e 64 20 36 0d 01  86 42 53 54 41 20 70 63  | and 6...BSTA pc|
000006a0  72 20 5c 20 69 6e 74 65  72 72 75 70 74 20 6f 6e  |r \ interrupt on|
000006b0  20 2b 76 65 20 74 72 61  6e 73 69 74 69 6f 6e 2c  | +ve transition,|
000006c0  20 43 42 32 20 69 6e 70  75 74 2c 20 44 52 42 20  | CB2 input, DRB |
000006d0  74 6f 20 63 6c 65 61 72  0d 01 90 1e 4c 44 41 20  |to clear....LDA |
000006e0  23 26 30 30 20 5c 20 75  73 65 72 20 70 6f 72 74  |#&00 \ user port|
000006f0  20 69 6e 70 75 74 0d 01  9a 28 53 54 41 20 64 64  | input...(STA dd|
00000700  72 62 20 5c 20 64 61 74  61 20 64 69 72 65 63 74  |rb \ data direct|
00000710  69 6f 6e 20 72 65 67 69  73 74 65 72 20 42 0d 01  |ion register B..|
00000720  a4 19 52 54 53 20 5c 20  72 65 74 75 72 6e 20 74  |..RTS \ return t|
00000730  6f 20 42 41 53 49 43 0d  01 ae 0c 2e 64 69 73 61  |o BASIC.....disa|
00000740  62 6c 65 0d 01 b8 3b 4c  44 41 20 23 26 31 38 20  |ble...;LDA #&18 |
00000750  5c 20 25 30 30 30 31 31  30 30 30 20 72 65 61 64  |\ %00011000 read|
00000760  79 20 74 6f 20 63 6c 65  61 72 20 62 69 74 73 20  |y to clear bits |
00000770  33 20 61 6e 64 20 34 20  6f 66 20 69 65 72 0d 01  |3 and 4 of ier..|
00000780  c2 31 4c 44 58 20 6f 6c  64 69 72 71 31 76 20 5c  |.1LDX oldirq1v \|
00000790  20 6f 72 69 67 69 6e 61  6c 20 69 72 71 31 20 76  | original irq1 v|
000007a0  65 63 74 6f 72 2c 20 6c  6f 77 20 62 79 74 65 0d  |ector, low byte.|
000007b0  01 cc 34 4c 44 59 20 6f  6c 64 69 72 71 31 76 2b  |..4LDY oldirq1v+|
000007c0  31 20 5c 20 6f 72 69 67  69 6e 61 6c 20 69 72 71  |1 \ original irq|
000007d0  31 20 76 65 63 74 6f 72  2c 20 68 69 67 68 20 62  |1 vector, high b|
000007e0  79 74 65 0d 01 d6 24 53  45 49 20 5c 20 73 65 74  |yte...$SEI \ set|
000007f0  20 69 6e 74 65 72 72 75  70 74 20 64 69 73 61 62  | interrupt disab|
00000800  6c 65 20 66 6c 61 67 0d  01 e0 27 53 54 41 20 69  |le flag...'STA i|
00000810  65 72 20 5c 20 69 6e 74  65 72 72 75 70 74 20 65  |er \ interrupt e|
00000820  6e 61 62 6c 65 20 72 65  67 69 73 74 65 72 0d 01  |nable register..|
00000830  ea 29 4c 44 41 20 70 63  72 20 5c 20 70 65 72 69  |.)LDA pcr \ peri|
00000840  70 68 65 72 61 6c 20 63  6f 6e 74 72 6f 6c 20 72  |pheral control r|
00000850  65 67 69 73 74 65 72 0d  01 f4 1b 80 20 23 26 30  |egister..... #&0|
00000860  46 20 5c 20 63 6c 65 61  72 20 62 69 74 73 20 34  |F \ clear bits 4|
00000870  2d 37 0d 01 fe 29 53 54  41 20 70 63 72 20 5c 20  |-7...)STA pcr \ |
00000880  70 65 72 69 70 68 65 72  61 6c 20 63 6f 6e 74 72  |peripheral contr|
00000890  6f 6c 20 72 65 67 69 73  74 65 72 0d 02 08 2d 53  |ol register...-S|
000008a0  54 58 20 69 72 71 31 76  20 5c 20 72 65 73 74 6f  |TX irq1v \ resto|
000008b0  72 65 20 69 72 71 31 20  76 65 63 74 6f 72 2c 20  |re irq1 vector, |
000008c0  6c 6f 77 20 62 79 74 65  0d 02 12 30 53 54 59 20  |low byte...0STY |
000008d0  69 72 71 31 76 2b 31 20  5c 20 72 65 73 74 6f 72  |irq1v+1 \ restor|
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000008f0  69 67 68 20 62 79 74 65  0d 02 1c 26 43 4c 49 20  |igh byte...&CLI |
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00001f70  22 3b 7e 3f 56 25 3b 22  20 22 0d 08 ac 2d e7 20  |";~?V%;" "...-. |
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00001fd0  20 20 20 20 20 20 22 0d  08 c0 30 e7 20 a6 28 2d  |      "...0. .(-|
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000020fd