Home » Personal collection » Acorn ADFS disks » Electron_User_Group » EUG_29.ADF » F/+MCART2

F/+MCART2

This website contains an archive of files for the Acorn Electron, BBC Micro, Acorn Archimedes, Commodore 16 and Commodore 64 computers, which Dominic Ford has rescued from his private collection of floppy disks and cassettes.

Some of these files were originally commercial releases in the 1980s and 1990s, but they are now widely available online. I assume that copyright over them is no longer being asserted. If you own the copyright and would like files to be removed, please contact me.

Tape/disk: Home » Personal collection » Acorn ADFS disks » Electron_User_Group » EUG_29.ADF
Filename: F/+MCART2
Read OK:
File size: 1035 bytes
Load address: 4D204556
Exec address: 54524143
File contents
�..
11  RNW/READY
    This has different functions on the Electron and the Master 128.
    On the Electron: READY - CPU wait state control : Open collector 
                     output.When driven low, this line will cause the 
                     CPU to extend its cycle until READY is released. 
                     This will only work on Electrons with CMOS CPUs. 
    With NMOS CPUs it will only work on read cycles.
    On the Master 128:
      R/W - Data Direction Control : Input with TTL levels
      This is the system data buffer direction control.  If low, 
      cartridges are being written to.If high and selected they may 
      drive the bus during PH12.

12 nNMI - Non maskable interrupt : Open collector output
   This signal is connected to the system NMI line. It is active low.

13 nIRQ - Interrupt request : Open collector output
   This signal is connected to the system IRQ line. It is active low.

14 nINFC - Internal Page &FC : Memory active decode input : TTL active 
   low When bit IFJ is set in the Master 128 ACCCON register, all 
   accesses to the address range &FC00 to &FCFF will cause this select 
   to become active. The ACCCON access is not applicable to the 
   Electron.

15 nINFD - Internal page &FD : Memory active decode input : TTL active 
   low.When bit IFJ is set in the Master 128 ACCCON register, all 
   accesses to the address range &FD00 to &FDFF will cause this select 
   to become active. The ACCCON access is not applicable to the 
   Electron.

16 ROMQA - Memory paging select : Input with TTL levels
   This is the least significant bit of the ROM select latch located 
   at &FE30 in the Master 128 and at &FE05 in the Electron.

17  Clock
    This connection has different uses in the Electron and Master 128:
    In the Electron: Clock is a 16MHz input with TTL levels.
    In the Master 128:
      Clock is a strap selectable function:
      a)  16MHz input with TTL levels.
      b)  8 MHz input with TTL levels.
    The functions are selected by links on the host computer. The user
    should ensure that the links are correct for a given application 
    and that proper termination is provided.

18  nROMSTB/nCRTCRST
    This has different functions on the Electron and Master 128:
    On the Electron:
    nROMSTB is an active low input using TTL levels which selects the
    location &FC73.  This is intended to be used as a paging register.
    On the Master 128:
    nCRTCRST is an active low output signal meeting TTL levels of the
    system CRTC reset input.  It is provided for use in genlock 
    applications.

19  ADOUT - System audio output
    This is the filtered output of the sum of all audio inputs to the 
    host computer.Significant load should not be taken from this node.

20  AGND - Audio Ground
    This is the zero volt return for ADOUT.  It should be used instead 
    of the system zero volt connection to reduce audio noise.

21  ADIN - Cartridge audio output
    In the Electron: This is merely a connection from one cartridge to 
                     the other.
    In the Master 128: This is an output to the host computer audio 
                  circuitry. It 'sees' an impedance of at least 
                  1.0kOhms. Two cartridges with audio output should
                  not be inserted into the host computer together.

22  0V - Zero volts
    This is the system earth return for digital signals.

SIDE 'B'

1  +5V - Power supply
   This is the system logic supply rail.  No more than 150mA should be
   drawn by a cartridge in a fully configured Master 128 computer, ie 
   with internal Second Processor fitted.  No more than 10mA should be 
   drawn by a cartridge fitted to the Electron.

2  A10 - Address line 10 : Input with TTL levels

3  D3 - Data bus line 3 : Input/Output with TTL levels

4  A11 - Address line 11 : Input with TTL levels

5  A9 - Address line 9 : Input with TTL levels

6  D7 - Most significant data bus line : Input/Output with TTL levels

7  D6 - Data bus line 6 : Input/Output with TTL levels

8  D5 - Data bus line 5 : Input/Output with TTL levels

9  D4 - Data bus line 4 : Input/Output with TTL levels

00000000  81 2e 2e 0d 31 31 20 20  52 4e 57 2f 52 45 41 44  |....11  RNW/READ|
00000010  59 0d 20 20 20 20 54 68  69 73 20 68 61 73 20 64  |Y.    This has d|
00000020  69 66 66 65 72 65 6e 74  20 66 75 6e 63 74 69 6f  |ifferent functio|
00000030  6e 73 20 6f 6e 20 74 68  65 20 45 6c 65 63 74 72  |ns on the Electr|
00000040  6f 6e 20 61 6e 64 20 74  68 65 20 4d 61 73 74 65  |on and the Maste|
00000050  72 20 31 32 38 2e 0d 20  20 20 20 4f 6e 20 74 68  |r 128..    On th|
00000060  65 20 45 6c 65 63 74 72  6f 6e 3a 20 52 45 41 44  |e Electron: READ|
00000070  59 20 2d 20 43 50 55 20  77 61 69 74 20 73 74 61  |Y - CPU wait sta|
00000080  74 65 20 63 6f 6e 74 72  6f 6c 20 3a 20 4f 70 65  |te control : Ope|
00000090  6e 20 63 6f 6c 6c 65 63  74 6f 72 20 0d 20 20 20  |n collector .   |
000000a0  20 20 20 20 20 20 20 20  20 20 20 20 20 20 20 20  |                |
000000b0  20 20 6f 75 74 70 75 74  2e 57 68 65 6e 20 64 72  |  output.When dr|
000000c0  69 76 65 6e 20 6c 6f 77  2c 20 74 68 69 73 20 6c  |iven low, this l|
000000d0  69 6e 65 20 77 69 6c 6c  20 63 61 75 73 65 20 74  |ine will cause t|
000000e0  68 65 20 0d 20 20 20 20  20 20 20 20 20 20 20 20  |he .            |
000000f0  20 20 20 20 20 20 20 20  20 43 50 55 20 74 6f 20  |         CPU to |
00000100  65 78 74 65 6e 64 20 69  74 73 20 63 79 63 6c 65  |extend its cycle|
00000110  20 75 6e 74 69 6c 20 52  45 41 44 59 20 69 73 20  | until READY is |
00000120  72 65 6c 65 61 73 65 64  2e 20 0d 20 20 20 20 20  |released. .     |
00000130  20 20 20 20 20 20 20 20  20 20 20 20 20 20 20 20  |                |
00000140  54 68 69 73 20 77 69 6c  6c 20 6f 6e 6c 79 20 77  |This will only w|
00000150  6f 72 6b 20 6f 6e 20 45  6c 65 63 74 72 6f 6e 73  |ork on Electrons|
00000160  20 77 69 74 68 20 43 4d  4f 53 20 43 50 55 73 2e  | with CMOS CPUs.|
00000170  20 0d 20 20 20 20 57 69  74 68 20 4e 4d 4f 53 20  | .    With NMOS |
00000180  43 50 55 73 20 69 74 20  77 69 6c 6c 20 6f 6e 6c  |CPUs it will onl|
00000190  79 20 77 6f 72 6b 20 6f  6e 20 72 65 61 64 20 63  |y work on read c|
000001a0  79 63 6c 65 73 2e 0d 20  20 20 20 4f 6e 20 74 68  |ycles..    On th|
000001b0  65 20 4d 61 73 74 65 72  20 31 32 38 3a 0d 20 20  |e Master 128:.  |
000001c0  20 20 20 20 52 2f 57 20  2d 20 44 61 74 61 20 44  |    R/W - Data D|
000001d0  69 72 65 63 74 69 6f 6e  20 43 6f 6e 74 72 6f 6c  |irection Control|
000001e0  20 3a 20 49 6e 70 75 74  20 77 69 74 68 20 54 54  | : Input with TT|
000001f0  4c 20 6c 65 76 65 6c 73  0d 20 20 20 20 20 20 54  |L levels.      T|
00000200  68 69 73 20 69 73 20 74  68 65 20 73 79 73 74 65  |his is the syste|
00000210  6d 20 64 61 74 61 20 62  75 66 66 65 72 20 64 69  |m data buffer di|
00000220  72 65 63 74 69 6f 6e 20  63 6f 6e 74 72 6f 6c 2e  |rection control.|
00000230  20 20 49 66 20 6c 6f 77  2c 20 0d 20 20 20 20 20  |  If low, .     |
00000240  20 63 61 72 74 72 69 64  67 65 73 20 61 72 65 20  | cartridges are |
00000250  62 65 69 6e 67 20 77 72  69 74 74 65 6e 20 74 6f  |being written to|
00000260  2e 49 66 20 68 69 67 68  20 61 6e 64 20 73 65 6c  |.If high and sel|
00000270  65 63 74 65 64 20 74 68  65 79 20 6d 61 79 20 0d  |ected they may .|
00000280  20 20 20 20 20 20 64 72  69 76 65 20 74 68 65 20  |      drive the |
00000290  62 75 73 20 64 75 72 69  6e 67 20 50 48 31 32 2e  |bus during PH12.|
000002a0  0d 0d 31 32 20 6e 4e 4d  49 20 2d 20 4e 6f 6e 20  |..12 nNMI - Non |
000002b0  6d 61 73 6b 61 62 6c 65  20 69 6e 74 65 72 72 75  |maskable interru|
000002c0  70 74 20 3a 20 4f 70 65  6e 20 63 6f 6c 6c 65 63  |pt : Open collec|
000002d0  74 6f 72 20 6f 75 74 70  75 74 0d 20 20 20 54 68  |tor output.   Th|
000002e0  69 73 20 73 69 67 6e 61  6c 20 69 73 20 63 6f 6e  |is signal is con|
000002f0  6e 65 63 74 65 64 20 74  6f 20 74 68 65 20 73 79  |nected to the sy|
00000300  73 74 65 6d 20 4e 4d 49  20 6c 69 6e 65 2e 20 49  |stem NMI line. I|
00000310  74 20 69 73 20 61 63 74  69 76 65 20 6c 6f 77 2e  |t is active low.|
00000320  0d 0d 31 33 20 6e 49 52  51 20 2d 20 49 6e 74 65  |..13 nIRQ - Inte|
00000330  72 72 75 70 74 20 72 65  71 75 65 73 74 20 3a 20  |rrupt request : |
00000340  4f 70 65 6e 20 63 6f 6c  6c 65 63 74 6f 72 20 6f  |Open collector o|
00000350  75 74 70 75 74 0d 20 20  20 54 68 69 73 20 73 69  |utput.   This si|
00000360  67 6e 61 6c 20 69 73 20  63 6f 6e 6e 65 63 74 65  |gnal is connecte|
00000370  64 20 74 6f 20 74 68 65  20 73 79 73 74 65 6d 20  |d to the system |
00000380  49 52 51 20 6c 69 6e 65  2e 20 49 74 20 69 73 20  |IRQ line. It is |
00000390  61 63 74 69 76 65 20 6c  6f 77 2e 0d 0d 31 34 20  |active low...14 |
000003a0  6e 49 4e 46 43 20 2d 20  49 6e 74 65 72 6e 61 6c  |nINFC - Internal|
000003b0  20 50 61 67 65 20 26 46  43 20 3a 20 4d 65 6d 6f  | Page &FC : Memo|
000003c0  72 79 20 61 63 74 69 76  65 20 64 65 63 6f 64 65  |ry active decode|
000003d0  20 69 6e 70 75 74 20 3a  20 54 54 4c 20 61 63 74  | input : TTL act|
000003e0  69 76 65 20 0d 20 20 20  6c 6f 77 20 57 68 65 6e  |ive .   low When|
000003f0  20 62 69 74 20 49 46 4a  20 69 73 20 73 65 74 20  | bit IFJ is set |
00000400  69 6e 20 74 68 65 20 4d  61 73 74 65 72 20 31 32  |in the Master 12|
00000410  38 20 41 43 43 43 4f 4e  20 72 65 67 69 73 74 65  |8 ACCCON registe|
00000420  72 2c 20 61 6c 6c 20 0d  20 20 20 61 63 63 65 73  |r, all .   acces|
00000430  73 65 73 20 74 6f 20 74  68 65 20 61 64 64 72 65  |ses to the addre|
00000440  73 73 20 72 61 6e 67 65  20 26 46 43 30 30 20 74  |ss range &FC00 t|
00000450  6f 20 26 46 43 46 46 20  77 69 6c 6c 20 63 61 75  |o &FCFF will cau|
00000460  73 65 20 74 68 69 73 20  73 65 6c 65 63 74 20 0d  |se this select .|
00000470  20 20 20 74 6f 20 62 65  63 6f 6d 65 20 61 63 74  |   to become act|
00000480  69 76 65 2e 20 54 68 65  20 41 43 43 43 4f 4e 20  |ive. The ACCCON |
00000490  61 63 63 65 73 73 20 69  73 20 6e 6f 74 20 61 70  |access is not ap|
000004a0  70 6c 69 63 61 62 6c 65  20 74 6f 20 74 68 65 20  |plicable to the |
000004b0  0d 20 20 20 45 6c 65 63  74 72 6f 6e 2e 0d 0d 31  |.   Electron...1|
000004c0  35 20 6e 49 4e 46 44 20  2d 20 49 6e 74 65 72 6e  |5 nINFD - Intern|
000004d0  61 6c 20 70 61 67 65 20  26 46 44 20 3a 20 4d 65  |al page &FD : Me|
000004e0  6d 6f 72 79 20 61 63 74  69 76 65 20 64 65 63 6f  |mory active deco|
000004f0  64 65 20 69 6e 70 75 74  20 3a 20 54 54 4c 20 61  |de input : TTL a|
00000500  63 74 69 76 65 20 0d 20  20 20 6c 6f 77 2e 57 68  |ctive .   low.Wh|
00000510  65 6e 20 62 69 74 20 49  46 4a 20 69 73 20 73 65  |en bit IFJ is se|
00000520  74 20 69 6e 20 74 68 65  20 4d 61 73 74 65 72 20  |t in the Master |
00000530  31 32 38 20 41 43 43 43  4f 4e 20 72 65 67 69 73  |128 ACCCON regis|
00000540  74 65 72 2c 20 61 6c 6c  20 0d 20 20 20 61 63 63  |ter, all .   acc|
00000550  65 73 73 65 73 20 74 6f  20 74 68 65 20 61 64 64  |esses to the add|
00000560  72 65 73 73 20 72 61 6e  67 65 20 26 46 44 30 30  |ress range &FD00|
00000570  20 74 6f 20 26 46 44 46  46 20 77 69 6c 6c 20 63  | to &FDFF will c|
00000580  61 75 73 65 20 74 68 69  73 20 73 65 6c 65 63 74  |ause this select|
00000590  20 0d 20 20 20 74 6f 20  62 65 63 6f 6d 65 20 61  | .   to become a|
000005a0  63 74 69 76 65 2e 20 54  68 65 20 41 43 43 43 4f  |ctive. The ACCCO|
000005b0  4e 20 61 63 63 65 73 73  20 69 73 20 6e 6f 74 20  |N access is not |
000005c0  61 70 70 6c 69 63 61 62  6c 65 20 74 6f 20 74 68  |applicable to th|
000005d0  65 20 0d 20 20 20 45 6c  65 63 74 72 6f 6e 2e 0d  |e .   Electron..|
000005e0  0d 31 36 20 52 4f 4d 51  41 20 2d 20 4d 65 6d 6f  |.16 ROMQA - Memo|
000005f0  72 79 20 70 61 67 69 6e  67 20 73 65 6c 65 63 74  |ry paging select|
00000600  20 3a 20 49 6e 70 75 74  20 77 69 74 68 20 54 54  | : Input with TT|
00000610  4c 20 6c 65 76 65 6c 73  0d 20 20 20 54 68 69 73  |L levels.   This|
00000620  20 69 73 20 74 68 65 20  6c 65 61 73 74 20 73 69  | is the least si|
00000630  67 6e 69 66 69 63 61 6e  74 20 62 69 74 20 6f 66  |gnificant bit of|
00000640  20 74 68 65 20 52 4f 4d  20 73 65 6c 65 63 74 20  | the ROM select |
00000650  6c 61 74 63 68 20 6c 6f  63 61 74 65 64 20 0d 20  |latch located . |
00000660  20 20 61 74 20 26 46 45  33 30 20 69 6e 20 74 68  |  at &FE30 in th|
00000670  65 20 4d 61 73 74 65 72  20 31 32 38 20 61 6e 64  |e Master 128 and|
00000680  20 61 74 20 26 46 45 30  35 20 69 6e 20 74 68 65  | at &FE05 in the|
00000690  20 45 6c 65 63 74 72 6f  6e 2e 0d 0d 31 37 20 20  | Electron...17  |
000006a0  43 6c 6f 63 6b 0d 20 20  20 20 54 68 69 73 20 63  |Clock.    This c|
000006b0  6f 6e 6e 65 63 74 69 6f  6e 20 68 61 73 20 64 69  |onnection has di|
000006c0  66 66 65 72 65 6e 74 20  75 73 65 73 20 69 6e 20  |fferent uses in |
000006d0  74 68 65 20 45 6c 65 63  74 72 6f 6e 20 61 6e 64  |the Electron and|
000006e0  20 4d 61 73 74 65 72 20  31 32 38 3a 0d 20 20 20  | Master 128:.   |
000006f0  20 49 6e 20 74 68 65 20  45 6c 65 63 74 72 6f 6e  | In the Electron|
00000700  3a 20 43 6c 6f 63 6b 20  69 73 20 61 20 31 36 4d  |: Clock is a 16M|
00000710  48 7a 20 69 6e 70 75 74  20 77 69 74 68 20 54 54  |Hz input with TT|
00000720  4c 20 6c 65 76 65 6c 73  2e 0d 20 20 20 20 49 6e  |L levels..    In|
00000730  20 74 68 65 20 4d 61 73  74 65 72 20 31 32 38 3a  | the Master 128:|
00000740  0d 20 20 20 20 20 20 43  6c 6f 63 6b 20 69 73 20  |.      Clock is |
00000750  61 20 73 74 72 61 70 20  73 65 6c 65 63 74 61 62  |a strap selectab|
00000760  6c 65 20 66 75 6e 63 74  69 6f 6e 3a 0d 20 20 20  |le function:.   |
00000770  20 20 20 61 29 20 20 31  36 4d 48 7a 20 69 6e 70  |   a)  16MHz inp|
00000780  75 74 20 77 69 74 68 20  54 54 4c 20 6c 65 76 65  |ut with TTL leve|
00000790  6c 73 2e 0d 20 20 20 20  20 20 62 29 20 20 38 20  |ls..      b)  8 |
000007a0  4d 48 7a 20 69 6e 70 75  74 20 77 69 74 68 20 54  |MHz input with T|
000007b0  54 4c 20 6c 65 76 65 6c  73 2e 0d 20 20 20 20 54  |TL levels..    T|
000007c0  68 65 20 66 75 6e 63 74  69 6f 6e 73 20 61 72 65  |he functions are|
000007d0  20 73 65 6c 65 63 74 65  64 20 62 79 20 6c 69 6e  | selected by lin|
000007e0  6b 73 20 6f 6e 20 74 68  65 20 68 6f 73 74 20 63  |ks on the host c|
000007f0  6f 6d 70 75 74 65 72 2e  20 54 68 65 20 75 73 65  |omputer. The use|
00000800  72 0d 20 20 20 20 73 68  6f 75 6c 64 20 65 6e 73  |r.    should ens|
00000810  75 72 65 20 74 68 61 74  20 74 68 65 20 6c 69 6e  |ure that the lin|
00000820  6b 73 20 61 72 65 20 63  6f 72 72 65 63 74 20 66  |ks are correct f|
00000830  6f 72 20 61 20 67 69 76  65 6e 20 61 70 70 6c 69  |or a given appli|
00000840  63 61 74 69 6f 6e 20 0d  20 20 20 20 61 6e 64 20  |cation .    and |
00000850  74 68 61 74 20 70 72 6f  70 65 72 20 74 65 72 6d  |that proper term|
00000860  69 6e 61 74 69 6f 6e 20  69 73 20 70 72 6f 76 69  |ination is provi|
00000870  64 65 64 2e 0d 0d 31 38  20 20 6e 52 4f 4d 53 54  |ded...18  nROMST|
00000880  42 2f 6e 43 52 54 43 52  53 54 0d 20 20 20 20 54  |B/nCRTCRST.    T|
00000890  68 69 73 20 68 61 73 20  64 69 66 66 65 72 65 6e  |his has differen|
000008a0  74 20 66 75 6e 63 74 69  6f 6e 73 20 6f 6e 20 74  |t functions on t|
000008b0  68 65 20 45 6c 65 63 74  72 6f 6e 20 61 6e 64 20  |he Electron and |
000008c0  4d 61 73 74 65 72 20 31  32 38 3a 0d 20 20 20 20  |Master 128:.    |
000008d0  4f 6e 20 74 68 65 20 45  6c 65 63 74 72 6f 6e 3a  |On the Electron:|
000008e0  0d 20 20 20 20 6e 52 4f  4d 53 54 42 20 69 73 20  |.    nROMSTB is |
000008f0  61 6e 20 61 63 74 69 76  65 20 6c 6f 77 20 69 6e  |an active low in|
00000900  70 75 74 20 75 73 69 6e  67 20 54 54 4c 20 6c 65  |put using TTL le|
00000910  76 65 6c 73 20 77 68 69  63 68 20 73 65 6c 65 63  |vels which selec|
00000920  74 73 20 74 68 65 0d 20  20 20 20 6c 6f 63 61 74  |ts the.    locat|
00000930  69 6f 6e 20 26 46 43 37  33 2e 20 20 54 68 69 73  |ion &FC73.  This|
00000940  20 69 73 20 69 6e 74 65  6e 64 65 64 20 74 6f 20  | is intended to |
00000950  62 65 20 75 73 65 64 20  61 73 20 61 20 70 61 67  |be used as a pag|
00000960  69 6e 67 20 72 65 67 69  73 74 65 72 2e 0d 20 20  |ing register..  |
00000970  20 20 4f 6e 20 74 68 65  20 4d 61 73 74 65 72 20  |  On the Master |
00000980  31 32 38 3a 0d 20 20 20  20 6e 43 52 54 43 52 53  |128:.    nCRTCRS|
00000990  54 20 69 73 20 61 6e 20  61 63 74 69 76 65 20 6c  |T is an active l|
000009a0  6f 77 20 6f 75 74 70 75  74 20 73 69 67 6e 61 6c  |ow output signal|
000009b0  20 6d 65 65 74 69 6e 67  20 54 54 4c 20 6c 65 76  | meeting TTL lev|
000009c0  65 6c 73 20 6f 66 20 74  68 65 0d 20 20 20 20 73  |els of the.    s|
000009d0  79 73 74 65 6d 20 43 52  54 43 20 72 65 73 65 74  |ystem CRTC reset|
000009e0  20 69 6e 70 75 74 2e 20  20 49 74 20 69 73 20 70  | input.  It is p|
000009f0  72 6f 76 69 64 65 64 20  66 6f 72 20 75 73 65 20  |rovided for use |
00000a00  69 6e 20 67 65 6e 6c 6f  63 6b 20 0d 20 20 20 20  |in genlock .    |
00000a10  61 70 70 6c 69 63 61 74  69 6f 6e 73 2e 0d 0d 31  |applications...1|
00000a20  39 20 20 41 44 4f 55 54  20 2d 20 53 79 73 74 65  |9  ADOUT - Syste|
00000a30  6d 20 61 75 64 69 6f 20  6f 75 74 70 75 74 0d 20  |m audio output. |
00000a40  20 20 20 54 68 69 73 20  69 73 20 74 68 65 20 66  |   This is the f|
00000a50  69 6c 74 65 72 65 64 20  6f 75 74 70 75 74 20 6f  |iltered output o|
00000a60  66 20 74 68 65 20 73 75  6d 20 6f 66 20 61 6c 6c  |f the sum of all|
00000a70  20 61 75 64 69 6f 20 69  6e 70 75 74 73 20 74 6f  | audio inputs to|
00000a80  20 74 68 65 20 0d 20 20  20 20 68 6f 73 74 20 63  | the .    host c|
00000a90  6f 6d 70 75 74 65 72 2e  53 69 67 6e 69 66 69 63  |omputer.Signific|
00000aa0  61 6e 74 20 6c 6f 61 64  20 73 68 6f 75 6c 64 20  |ant load should |
00000ab0  6e 6f 74 20 62 65 20 74  61 6b 65 6e 20 66 72 6f  |not be taken fro|
00000ac0  6d 20 74 68 69 73 20 6e  6f 64 65 2e 0d 0d 32 30  |m this node...20|
00000ad0  20 20 41 47 4e 44 20 2d  20 41 75 64 69 6f 20 47  |  AGND - Audio G|
00000ae0  72 6f 75 6e 64 0d 20 20  20 20 54 68 69 73 20 69  |round.    This i|
00000af0  73 20 74 68 65 20 7a 65  72 6f 20 76 6f 6c 74 20  |s the zero volt |
00000b00  72 65 74 75 72 6e 20 66  6f 72 20 41 44 4f 55 54  |return for ADOUT|
00000b10  2e 20 20 49 74 20 73 68  6f 75 6c 64 20 62 65 20  |.  It should be |
00000b20  75 73 65 64 20 69 6e 73  74 65 61 64 20 0d 20 20  |used instead .  |
00000b30  20 20 6f 66 20 74 68 65  20 73 79 73 74 65 6d 20  |  of the system |
00000b40  7a 65 72 6f 20 76 6f 6c  74 20 63 6f 6e 6e 65 63  |zero volt connec|
00000b50  74 69 6f 6e 20 74 6f 20  72 65 64 75 63 65 20 61  |tion to reduce a|
00000b60  75 64 69 6f 20 6e 6f 69  73 65 2e 0d 0d 32 31 20  |udio noise...21 |
00000b70  20 41 44 49 4e 20 2d 20  43 61 72 74 72 69 64 67  | ADIN - Cartridg|
00000b80  65 20 61 75 64 69 6f 20  6f 75 74 70 75 74 0d 20  |e audio output. |
00000b90  20 20 20 49 6e 20 74 68  65 20 45 6c 65 63 74 72  |   In the Electr|
00000ba0  6f 6e 3a 20 54 68 69 73  20 69 73 20 6d 65 72 65  |on: This is mere|
00000bb0  6c 79 20 61 20 63 6f 6e  6e 65 63 74 69 6f 6e 20  |ly a connection |
00000bc0  66 72 6f 6d 20 6f 6e 65  20 63 61 72 74 72 69 64  |from one cartrid|
00000bd0  67 65 20 74 6f 20 0d 20  20 20 20 20 20 20 20 20  |ge to .         |
00000be0  20 20 20 20 20 20 20 20  20 20 20 20 74 68 65 20  |            the |
00000bf0  6f 74 68 65 72 2e 0d 20  20 20 20 49 6e 20 74 68  |other..    In th|
00000c00  65 20 4d 61 73 74 65 72  20 31 32 38 3a 20 54 68  |e Master 128: Th|
00000c10  69 73 20 69 73 20 61 6e  20 6f 75 74 70 75 74 20  |is is an output |
00000c20  74 6f 20 74 68 65 20 68  6f 73 74 20 63 6f 6d 70  |to the host comp|
00000c30  75 74 65 72 20 61 75 64  69 6f 20 0d 20 20 20 20  |uter audio .    |
00000c40  20 20 20 20 20 20 20 20  20 20 20 20 20 20 63 69  |              ci|
00000c50  72 63 75 69 74 72 79 2e  20 49 74 20 27 73 65 65  |rcuitry. It 'see|
00000c60  73 27 20 61 6e 20 69 6d  70 65 64 61 6e 63 65 20  |s' an impedance |
00000c70  6f 66 20 61 74 20 6c 65  61 73 74 20 0d 20 20 20  |of at least .   |
00000c80  20 20 20 20 20 20 20 20  20 20 20 20 20 20 20 31  |               1|
00000c90  2e 30 6b 4f 68 6d 73 2e  20 54 77 6f 20 63 61 72  |.0kOhms. Two car|
00000ca0  74 72 69 64 67 65 73 20  77 69 74 68 20 61 75 64  |tridges with aud|
00000cb0  69 6f 20 6f 75 74 70 75  74 20 73 68 6f 75 6c 64  |io output should|
00000cc0  0d 20 20 20 20 20 20 20  20 20 20 20 20 20 20 20  |.               |
00000cd0  20 20 20 6e 6f 74 20 62  65 20 69 6e 73 65 72 74  |   not be insert|
00000ce0  65 64 20 69 6e 74 6f 20  74 68 65 20 68 6f 73 74  |ed into the host|
00000cf0  20 63 6f 6d 70 75 74 65  72 20 74 6f 67 65 74 68  | computer togeth|
00000d00  65 72 2e 0d 0d 32 32 20  20 30 56 20 2d 20 5a 65  |er...22  0V - Ze|
00000d10  72 6f 20 76 6f 6c 74 73  0d 20 20 20 20 54 68 69  |ro volts.    Thi|
00000d20  73 20 69 73 20 74 68 65  20 73 79 73 74 65 6d 20  |s is the system |
00000d30  65 61 72 74 68 20 72 65  74 75 72 6e 20 66 6f 72  |earth return for|
00000d40  20 64 69 67 69 74 61 6c  20 73 69 67 6e 61 6c 73  | digital signals|
00000d50  2e 0d 0d 53 49 44 45 20  27 42 27 0d 0d 31 20 20  |...SIDE 'B'..1  |
00000d60  2b 35 56 20 2d 20 50 6f  77 65 72 20 73 75 70 70  |+5V - Power supp|
00000d70  6c 79 0d 20 20 20 54 68  69 73 20 69 73 20 74 68  |ly.   This is th|
00000d80  65 20 73 79 73 74 65 6d  20 6c 6f 67 69 63 20 73  |e system logic s|
00000d90  75 70 70 6c 79 20 72 61  69 6c 2e 20 20 4e 6f 20  |upply rail.  No |
00000da0  6d 6f 72 65 20 74 68 61  6e 20 31 35 30 6d 41 20  |more than 150mA |
00000db0  73 68 6f 75 6c 64 20 62  65 0d 20 20 20 64 72 61  |should be.   dra|
00000dc0  77 6e 20 62 79 20 61 20  63 61 72 74 72 69 64 67  |wn by a cartridg|
00000dd0  65 20 69 6e 20 61 20 66  75 6c 6c 79 20 63 6f 6e  |e in a fully con|
00000de0  66 69 67 75 72 65 64 20  4d 61 73 74 65 72 20 31  |figured Master 1|
00000df0  32 38 20 63 6f 6d 70 75  74 65 72 2c 20 69 65 20  |28 computer, ie |
00000e00  0d 20 20 20 77 69 74 68  20 69 6e 74 65 72 6e 61  |.   with interna|
00000e10  6c 20 53 65 63 6f 6e 64  20 50 72 6f 63 65 73 73  |l Second Process|
00000e20  6f 72 20 66 69 74 74 65  64 2e 20 20 4e 6f 20 6d  |or fitted.  No m|
00000e30  6f 72 65 20 74 68 61 6e  20 31 30 6d 41 20 73 68  |ore than 10mA sh|
00000e40  6f 75 6c 64 20 62 65 20  0d 20 20 20 64 72 61 77  |ould be .   draw|
00000e50  6e 20 62 79 20 61 20 63  61 72 74 72 69 64 67 65  |n by a cartridge|
00000e60  20 66 69 74 74 65 64 20  74 6f 20 74 68 65 20 45  | fitted to the E|
00000e70  6c 65 63 74 72 6f 6e 2e  0d 0d 32 20 20 41 31 30  |lectron...2  A10|
00000e80  20 2d 20 41 64 64 72 65  73 73 20 6c 69 6e 65 20  | - Address line |
00000e90  31 30 20 3a 20 49 6e 70  75 74 20 77 69 74 68 20  |10 : Input with |
00000ea0  54 54 4c 20 6c 65 76 65  6c 73 0d 0d 33 20 20 44  |TTL levels..3  D|
00000eb0  33 20 2d 20 44 61 74 61  20 62 75 73 20 6c 69 6e  |3 - Data bus lin|
00000ec0  65 20 33 20 3a 20 49 6e  70 75 74 2f 4f 75 74 70  |e 3 : Input/Outp|
00000ed0  75 74 20 77 69 74 68 20  54 54 4c 20 6c 65 76 65  |ut with TTL leve|
00000ee0  6c 73 0d 0d 34 20 20 41  31 31 20 2d 20 41 64 64  |ls..4  A11 - Add|
00000ef0  72 65 73 73 20 6c 69 6e  65 20 31 31 20 3a 20 49  |ress line 11 : I|
00000f00  6e 70 75 74 20 77 69 74  68 20 54 54 4c 20 6c 65  |nput with TTL le|
00000f10  76 65 6c 73 0d 0d 35 20  20 41 39 20 2d 20 41 64  |vels..5  A9 - Ad|
00000f20  64 72 65 73 73 20 6c 69  6e 65 20 39 20 3a 20 49  |dress line 9 : I|
00000f30  6e 70 75 74 20 77 69 74  68 20 54 54 4c 20 6c 65  |nput with TTL le|
00000f40  76 65 6c 73 0d 0d 36 20  20 44 37 20 2d 20 4d 6f  |vels..6  D7 - Mo|
00000f50  73 74 20 73 69 67 6e 69  66 69 63 61 6e 74 20 64  |st significant d|
00000f60  61 74 61 20 62 75 73 20  6c 69 6e 65 20 3a 20 49  |ata bus line : I|
00000f70  6e 70 75 74 2f 4f 75 74  70 75 74 20 77 69 74 68  |nput/Output with|
00000f80  20 54 54 4c 20 6c 65 76  65 6c 73 0d 0d 37 20 20  | TTL levels..7  |
00000f90  44 36 20 2d 20 44 61 74  61 20 62 75 73 20 6c 69  |D6 - Data bus li|
00000fa0  6e 65 20 36 20 3a 20 49  6e 70 75 74 2f 4f 75 74  |ne 6 : Input/Out|
00000fb0  70 75 74 20 77 69 74 68  20 54 54 4c 20 6c 65 76  |put with TTL lev|
00000fc0  65 6c 73 0d 0d 38 20 20  44 35 20 2d 20 44 61 74  |els..8  D5 - Dat|
00000fd0  61 20 62 75 73 20 6c 69  6e 65 20 35 20 3a 20 49  |a bus line 5 : I|
00000fe0  6e 70 75 74 2f 4f 75 74  70 75 74 20 77 69 74 68  |nput/Output with|
00000ff0  20 54 54 4c 20 6c 65 76  65 6c 73 0d 0d 39 20 20  | TTL levels..9  |
00001000  44 34 20 2d 20 44 61 74  61 20 62 75 73 20 6c 69  |D4 - Data bus li|
00001010  6e 65 20 34 20 3a 20 49  6e 70 75 74 2f 4f 75 74  |ne 4 : Input/Out|
00001020  70 75 74 20 77 69 74 68  20 54 54 4c 20 6c 65 76  |put with TTL lev|
00001030  65 6c 73 0d 0d                                    |els..|
00001035
F/+MCART2.m0
F/+MCART2.m1
F/+MCART2.m2
F/+MCART2.m4
F/+MCART2.m5