Home » CEEFAX disks » telesoftware11.adl » 01-01-89/ANMOUSE
01-01-89/ANMOUSE
This website contains an archive of files for the Acorn Electron, BBC Micro, Acorn Archimedes, Commodore 16 and Commodore 64 computers, which Dominic Ford has rescued from his private collection of floppy disks and cassettes.
Some of these files were originally commercial releases in the 1980s and 1990s, but they are now widely available online. I assume that copyright over them is no longer being asserted. If you own the copyright and would like files to be removed, please contact me.
| Tape/disk: | Home » CEEFAX disks » telesoftware11.adl |
| Filename: | 01-01-89/ANMOUSE |
| Read OK: | ✔ |
| File size: | 1C12 bytes |
| Load address: | FFFF0E00 |
| Exec address: | FFFF802B |
File contents
10REM> ANMOUSE 20DIM mcode &200 :REM: machine code at mcode 30savereg=&FC :REM: interrupt accumulator save register 40irq1v=&204 :REM: primary interrupt vector 50bytev=&20A :REM: Osbyte indirection vector 60drb=&FE60 :REM: data register B 70ddrb=&FE62 :REM: data direction register B 80pcr=&FE6C :REM: peripheral control register 90ifr=&FE6D :REM: interrupt flag register 100ier=&FE6E :REM: interrupt enable register 110osbyte=&FFF4 120FOR pass=0 TO 2 STEP 2 130P%=mcode 140[OPT pass 150LDX irq1v \ current primary interrupt vector, low byte 160LDY irq1v+1 \ current primary interrupt vector, high byte 170CPY #interrupt DIV 256 \ compare high byte 180BEQ disable \ restore old vector if altered 190STX oldirq1v \ save original irq1 vector, low byte 200STY oldirq1v+1 \ save original irq1 vector, high byte 210LDX bytev \ Osbyte indirection vector, low byte 220LDY bytev+1 \ Osbyte indirection vector, high byte 230STX oldbytev \ save Osbyte indirection vector, low byte 240STY oldbytev+1 \ save Osbyte indirection vector, high byte 250LDX #interrupt MOD 256 \ new irq1 vector, low byte 260LDY #interrupt DIV 256 \ new irq1 vector, high byte 270SEI \ set interrupt disable flag 280STX irq1v \ alter irq1 vector, low byte 290STY irq1v+1 \ alter irq1 vector, high byte 300CLI \ clear interrupt disable flag 310LDX #analogue MOD 256 \ new Osbyte indirection vector, low byte 320LDY #analogue DIV 256 \ new Osbyte indirection vector, high byte 330STX bytev \ alter Osbyte indirection vector, low byte 340STY bytev+1 \ alter Osbyte indirection vector, high byte 350LDA #&98 \ %10011000, ie. enable CB1/2 360STA ier \ interrupt enable register 370LDA pcr \ peripheral control register 380AND #&0F \ AND with %00001111, ie clear bits 4-7 390ORA #&50 \ OR with %01010000, ie. set bits 4 and 6 400STA pcr \ interrupt on +ve transition, CB2 input, DRB to clear 410LDA #&00 \ user port input 420STA ddrb \ data direction register B 430LDA #&10 \ ADC channel select 440LDX #&00 \ sampling disabled 450JMP osbyte \ Osbyte and return to BASIC 460.disable 470LDA #&18 \ %00011000, to clear bits 3 and 4 of ier 480LDX oldirq1v \ original 1rq1 vector, low byte 490LDY oldirq1v+1 \ original irq1 vector, high byte 500SEI \ set interrupt disable flag 510STA ier \ interrupt enable register 520LDA pcr \ peripheral control register 530AND #&0F \ AND with %00001111, ie. clear bits 4-7 540STA pcr \ peripheral control register 550STX irq1v \ restore the original irq1 vector, low byte 560STY irq1v+1 \ restore the original irq1 vector, high byte 570CLI \ clear interrupt disable flag 580LDX oldbytev \ original Osbyte indirection vector, low byte 590LDY oldbytev+1 \ original Osbyte indirection vector, high byte 600STX bytev \ restore the Osbyte vector, low byte 610STY bytev+1 \ restore the Osbyte vector, high byte 620LDA #&10 \ select ADC channel 630LDX #&04 \ 4 channels to be sampled 640JMP osbyte \ Osbyte and return to BASIC 650.interrupt 660LDA savereg \ interrupt accumulator save register 670PHA \ and push it on the stack 680LDA ifr \ interrupt flag register 690BPL notuser \ bit 7 is set if VIA-B interrupt 700AND #&18 \ AND with %00011000, ie. test bits 3 and 4 710BEQ notuser \ exit if not CB1 or CB2 720AND #&10 \ AND with %00010000, ie. test CB1 730BNE xpulse \ bit 4 set for an X direction movement 740LDA drb \ data register B 750AND #&04 \ AND with %00000100, ie. test bit 2 760BNE ydown \ if bit 2 is set then Y is going down 770INC ycoord \ Y is going up so increment Y coordinate 780BNE exit \ branch if in the range 1 to 255 790BEQ decy \ if zero then alter to 255 800.ydown 810LDA ycoord \ load Y coordinate 820BEQ exit \ branch if zero because it can't go any lower 830.decy 840DEC ycoord \ reduce Y coordinate by 1 850JMP exit \ restore interrupt accumulator save register and RTI 860.xpulse 870LDA drb \ data register B 880ROR A \ bit 0 into carry 890BCC xdown \ X is going down if bit 0 is set - but fudge for joystick simulation 900INC xcoord \ X is going up if bit 0 is clear - but fudge for joystick simulation 910BNE exit \ exit if X coordinate is in the range from 1 to 255 920BEQ decx \ if X coordinate = 0 then make it 255 930.xdown 940LDA xcoord \ load X coordinate 950BEQ exit \ if it is zero it can't go any lower 960.decx 970DEC xcoord \ decrease X coordinate by 1 980.exit 990PLA \ pull interrupt accumulator save register off the stack 1000STA savereg \ and restore zero page 1010RTI \ return from interrupt 1020.notuser 1030PLA \ pull the interrupt accumulator save register off the stack 1040STA savereg \ restore the zero page address 1050JMP (oldirq1v) \ exit via the original vector 1060.analogue 1070PHP \ push the status register 1080CMP #&80 \ Osbyte &80 is read ADC channel or get buffer status 1090BNE oldadval \ branch if not Osbyte &80 1100CPX #&00 \ is this ADVAL(0) ie. read fire buttons? 1110BEQ firebuttons \ branch to simulate read fire buttons 1120BPL newadval \ if X = 1 to 4 then simulate ADC conversion 1130.oldadval 1140PLP \ pull status register 1150.original 1160JMP (oldbytev) \ exit via original Osbyte vector 1170.newadval 1180TXA \ X contains channel number (1 to 4) 1190ROR A \ bit 0 into carry 1200LDA ycoord \ load Y coordinate 1210BCC skipxcoord \ branch if ADVAL(1) or ADVAL(3) 1220LDA xcoord \ load X coordinate 1230.skipxcoord 1240TAY \ Y = high byte of 16 bit simulated ADC 1250AND #&F0 \ AND with %11110000, ie. clear bits 0-3 1260TAX \ X = low byte of 16 bit simulated ADC 1270LDA #&80 \ Osbyte &80 1280PLP \ restore status register 1290RTS \ return to BASIC 1300.firebuttons 1310JSR original \ perform the original ADVAL(0) 1320TXA \ result of reading fire buttons is in X 1330PHA \ push X 1340LDA drb \ data register B 1350ROL A \ bit 7 into carry 1360BCC right \ bit 7 clear = right button pressed 1370ROL A \ bit 6 into carry 1380BCC centre \ bit 6 clear = centre button pressed 1390ROL A \ bit 5 into carry 1400BCS nopress \ bit 5 set = no buttons pressed, clear = left button pressed 1410PLA \ pull the result of ADVAL(0) 1420ORA #&01 \ set bit 0 1430BNE getout \ and return to BASIC 1440.right 1450PLA \ pull the result of ADVAL(0) 1460ORA #&02 \ set bit 1 1470BNE getout \ and return to BASIC 1480.centre 1490PLA \ pull the result of ADVAL(0) 1500ORA #&03 \ set bits 0 and 1 1510BNE getout \ and return to BASIC 1520.nopress 1530PLA \ pull the result of ADVAL(0) 1540.getout 1550TAX \ result bye into X register 1560LDA #&80 \ Osbyte &80 1570PLP \ restore status register 1580RTS \ return to BASIC 1590.oldirq1v 1600EQUW &00 \ original irq1 vector 1610.oldbytev 1620EQUW &00 \ original Osbyte vector 1630.xcoord 1640EQUB &80 \ X coordinate, range 0 to 255 1650.ycoord 1660EQUB &80 \ Y coordinate, range 0 to 255 1670.lastbyte 1680] 1690NEXT 1700CALL mcode 1710MODE7 1720mouse$=CHR$141+CHR$132+CHR$157+CHR$131+"Mouse coordinates via ADVAL(0-4) "+CHR$156 1730PRINTTAB(0,1)mouse$ 1740PRINTTAB(0,2)mouse$ 1750PRINTTAB(10,6)"Bytes used = &";~(lastbyte-mcode) 1760ONERROR GOTO 1890 1770VDU23,1,0;0;0;0; 1780REPEAT 1790PRINTTAB(10,10)"X = &";~?xcoord;" " 1800PRINTTAB(20,10)"Y = &";~?ycoord;" " 1810adval=ADVAL(0)AND3 1820PRINTTAB(10,14)"ADVAL(0)AND3 = ";adval 1830IF adval=2 PRINTTAB(22,17)"Right" ELSE PRINTTAB(22,17)" " 1840IF adval=3 PRINTTAB(16,17)"Both" ELSE PRINTTAB(16,17)" " 1850IF adval=1 PRINTTAB(10,17)"Left" ELSE PRINTTAB(10,17)" " 1860PRINTTAB(2,20)"ADVAL(1) = ";ADVAL(1);" "TAB(22,20)"ADVAL(2) = ";ADVAL(2);" " 1870PRINTTAB(2,22)"ADVAL(3) = ";ADVAL(1);" "TAB(22,22)"ADVAL(4) = ";ADVAL(4);" " 1880UNTIL FALSE 1890CALL mcode 1900VDU23,1,1;0;0;0;31,0,23 1910END
�> ANMOUSE *� mcode &200 :�: machine code at mcode 7savereg=&FC :�: interrupt accumulator save register (+irq1v=&204 :�: primary interrupt vector 2,bytev=&20A :�: Osbyte indirection vector <!drb=&FE60 :�: data register B F,ddrb=&FE62 :�: data direction register B P-pcr=&FE6C :�: peripheral control register Z)ifr=&FE6D :�: interrupt flag register d+ier=&FE6E :�: interrupt enable register nosbyte=&FFF4 x� pass=0 � 2 � 2 � P%=mcode � [OPT pass �:LDX irq1v \ current primary interrupt vector, low byte �=LDY irq1v+1 \ current primary interrupt vector, high byte �,CPY #interrupt � 256 \ compare high byte �/BEQ disable \ restore old vector if altered �6STX oldirq1v \ save original irq1 vector, low byte �9STY oldirq1v+1 \ save original irq1 vector, high byte �3LDX bytev \ Osbyte indirection vector, low byte �6LDY bytev+1 \ Osbyte indirection vector, high byte �;STX oldbytev \ save Osbyte indirection vector, low byte �>STY oldbytev+1 \ save Osbyte indirection vector, high byte �4LDX #interrupt � 256 \ new irq1 vector, low byte 5LDY #interrupt � 256 \ new irq1 vector, high byte $SEI \ set interrupt disable flag +STX irq1v \ alter irq1 vector, low byte ".STY irq1v+1 \ alter irq1 vector, high byte ,&CLI \ clear interrupt disable flag 6ALDX #analogue � 256 \ new Osbyte indirection vector, low byte @BLDY #analogue � 256 \ new Osbyte indirection vector, high byte J9STX bytev \ alter Osbyte indirection vector, low byte T<STY bytev+1 \ alter Osbyte indirection vector, high byte ^*LDA #&98 \ %10011000, ie. enable CB1/2 h'STA ier \ interrupt enable register r)LDA pcr \ peripheral control register |0� #&0F \ � with %00001111, ie clear bits 4-7 �4�A #&50 \ � with %01010000, ie. set bits 4 and 6 �BSTA pcr \ interrupt on +ve transition, CB2 input, DRB to clear � LDA #&00 \ user port input �(STA ddrb \ data direction register B �!LDA #&10 \ ADC channel select � LDX #&00 \ sampling disabled �+JMP osbyte \ Osbyte and return to BASIC � .disable �6LDA #&18 \ %00011000, to clear bits 3 and 4 of ier �1LDX oldirq1v \ original 1rq1 vector, low byte �4LDY oldirq1v+1 \ original irq1 vector, high byte �$SEI \ set interrupt disable flag �'STA ier \ interrupt enable register )LDA pcr \ peripheral control register 1� #&0F \ � with %00001111, ie. clear bits 4-7 )STA pcr \ peripheral control register &:STX irq1v \ restore the original irq1 vector, low byte 0=STY irq1v+1 \ restore the original irq1 vector, high byte :&CLI \ clear interrupt disable flag D?LDX oldbytev \ original Osbyte indirection vector, low byte NBLDY oldbytev+1 \ original Osbyte indirection vector, high byte X3STX bytev \ restore the Osbyte vector, low byte b6STY bytev+1 \ restore the Osbyte vector, high byte l!LDA #&10 \ select ADC channel v'LDX #&04 \ 4 channels to be sampled �+JMP osbyte \ Osbyte and return to BASIC �.interrupt �5LDA savereg \ interrupt accumulator save register �"PHA \ and push it on the stack �%LDA ifr \ interrupt flag register �1BPL notuser \ bit 7 is set if VIA-B interrupt �4� #&18 \ � with %00011000, ie. test bits 3 and 4 �(BEQ notuser \ exit if not CB1 or CB2 �+� #&10 \ � with %00010000, ie. test CB1 �6BNE xpulse \ bit 4 set for an X direction movement � LDA drb \ data register B �-� #&04 \ � with %00000100, ie. test bit 2 �4BNE ydown \ if bit 2 is set then Y is going down 8INC ycoord \ Y is going up so increment Y coordinate .BNE exit \ branch if in the range 1 to 255 (BEQ decy \ if zero then alter to 255 .ydown *"LDA ycoord \ load Y coordinate 4;BEQ exit \ branch if zero because it can't go any lower > .decy H)DEC ycoord \ reduce Y coordinate by 1 RBJMP exit \ restore interrupt accumulator save register and RTI \ .xpulse f LDA drb \ data register B p ROR A \ bit 0 into carry zSBCC xdown \ X is going down if bit 0 is set - but fudge for joystick simulation �TINC xcoord \ X is going up if bit 0 is clear - but fudge for joystick simulation �ABNE exit \ exit if X coordinate is in the range from 1 to 255 �3BEQ decx \ if X coordinate = 0 then make it 255 � .xdown �"LDA xcoord \ load X coordinate �2BEQ exit \ if it is zero it can't go any lower � .decx �+DEC xcoord \ decrease X coordinate by 1 � .exit �@PLA \ pull interrupt accumulator save register off the stack �'STA savereg \ and restore zero page � RTI \ return from interrupt � .notuser DPLA \ pull the interrupt accumulator save register off the stack /STA savereg \ restore the zero page address 1JMP (oldirq1v) \ exit via the original vector $ .analogue ."PHP \ push the status register 8BCMP #&80 \ Osbyte &80 is read ADC channel or get buffer status B+BNE oldadval \ branch if not Osbyte &80 L2CPX #&00 \ is this �(0) ie. read fire buttons? V:BEQ firebuttons \ branch to simulate read fire buttons `=BPL newadval \ if X = 1 to 4 then simulate ADC conversion j .oldadval t PLP \ pull status register ~ .original �4JMP (oldbytev) \ exit via original Osbyte vector � .newadval �,TXA \ X contains channel number (1 to 4) � ROR A \ bit 0 into carry �"LDA ycoord \ load Y coordinate �+BCC skipxcoord \ branch if �(1) or �(3) �"LDA xcoord \ load X coordinate �.skipxcoord �/TAY \ Y = high byte of 16 bit simulated ADC �1� #&F0 \ � with %11110000, ie. clear bits 0-3 �.TAX \ X = low byte of 16 bit simulated ADC �LDA #&80 \ Osbyte &80 !PLP \ restore status register RTS \ return to BASIC .firebuttons ,JSR original \ perform the original �(0) (0TXA \ result of reading fire buttons is in X 2PHA \ push X < LDA drb \ data register B F ROL A \ bit 7 into carry P2BCC right \ bit 7 clear = right button pressed Z ROL A \ bit 6 into carry d4BCC centre \ bit 6 clear = centre button pressed n ROL A \ bit 5 into carry xMBCS nopress \ bit 5 set = no buttons pressed, clear = left button pressed �!PLA \ pull the result of �(0) ��A #&01 \ set bit 0 �$BNE getout \ and return to BASIC � .right �!PLA \ pull the result of �(0) ��A #&02 \ set bit 1 �$BNE getout \ and return to BASIC � .centre �!PLA \ pull the result of �(0) � �A #&03 \ set bits 0 and 1 �$BNE getout \ and return to BASIC � .nopress �!PLA \ pull the result of �(0) .getout $TAX \ result bye into X register LDA #&80 \ Osbyte &80 "!PLP \ restore status register ,RTS \ return to BASIC 6 .oldirq1v @#EQUW &00 \ original irq1 vector J .oldbytev T%EQUW &00 \ original Osbyte vector ^ .xcoord h+EQUB &80 \ X coordinate, range 0 to 255 r .ycoord |+EQUB &80 \ Y coordinate, range 0 to 255 � .lastbyte �] �� � � mcode ��7 �Hmouse$=�141+�132+�157+�131+"Mouse coordinates via ADVAL(0-4) "+�156 ��0,1)mouse$ ��0,2)mouse$ �-�10,6)"Bytes used = &";~(lastbyte-mcode) � � � �DbG ��23,1,0;0;0;0; �� � �10,10)"X = &";~?xcoord;" " �20,10)"Y = &";~?ycoord;" " adval=�(0)�3 #�10,14)"ADVAL(0)AND3 = ";adval &/� adval=2 �22,17)"Right" � �22,17)" " 0.� adval=3 �16,17)"Both" � �16,17)" " :-� adval=1 �10,17)"Left" � �10,17)" " DD�2,20)"ADVAL(1) = ";�(1);" "�22,20)"ADVAL(2) = ";�(2);" " ND�2,22)"ADVAL(3) = ";�(1);" "�22,22)"ADVAL(4) = ";�(4);" " X� � b � mcode l�23,1,1;0;0;0;31,0,23 v� �
00000000 0d 00 0a 0e f4 3e 20 41 4e 4d 4f 55 53 45 0d 00 |.....> ANMOUSE..| 00000010 14 2a de 20 6d 63 6f 64 65 20 26 32 30 30 20 3a |.*. mcode &200 :| 00000020 f4 3a 20 6d 61 63 68 69 6e 65 20 63 6f 64 65 20 |.: machine code | 00000030 61 74 20 6d 63 6f 64 65 0d 00 1e 37 73 61 76 65 |at mcode...7save| 00000040 72 65 67 3d 26 46 43 20 3a f4 3a 20 69 6e 74 65 |reg=&FC :.: inte| 00000050 72 72 75 70 74 20 61 63 63 75 6d 75 6c 61 74 6f |rrupt accumulato| 00000060 72 20 73 61 76 65 20 72 65 67 69 73 74 65 72 0d |r save register.| 00000070 00 28 2b 69 72 71 31 76 3d 26 32 30 34 20 3a f4 |.(+irq1v=&204 :.| 00000080 3a 20 70 72 69 6d 61 72 79 20 69 6e 74 65 72 72 |: primary interr| 00000090 75 70 74 20 76 65 63 74 6f 72 0d 00 32 2c 62 79 |upt vector..2,by| 000000a0 74 65 76 3d 26 32 30 41 20 3a f4 3a 20 4f 73 62 |tev=&20A :.: Osb| 000000b0 79 74 65 20 69 6e 64 69 72 65 63 74 69 6f 6e 20 |yte indirection | 000000c0 76 65 63 74 6f 72 0d 00 3c 21 64 72 62 3d 26 46 |vector..<!drb=&F| 000000d0 45 36 30 20 3a f4 3a 20 64 61 74 61 20 72 65 67 |E60 :.: data reg| 000000e0 69 73 74 65 72 20 42 0d 00 46 2c 64 64 72 62 3d |ister B..F,ddrb=| 000000f0 26 46 45 36 32 20 3a f4 3a 20 64 61 74 61 20 64 |&FE62 :.: data d| 00000100 69 72 65 63 74 69 6f 6e 20 72 65 67 69 73 74 65 |irection registe| 00000110 72 20 42 0d 00 50 2d 70 63 72 3d 26 46 45 36 43 |r B..P-pcr=&FE6C| 00000120 20 3a f4 3a 20 70 65 72 69 70 68 65 72 61 6c 20 | :.: peripheral | 00000130 63 6f 6e 74 72 6f 6c 20 72 65 67 69 73 74 65 72 |control register| 00000140 0d 00 5a 29 69 66 72 3d 26 46 45 36 44 20 3a f4 |..Z)ifr=&FE6D :.| 00000150 3a 20 69 6e 74 65 72 72 75 70 74 20 66 6c 61 67 |: interrupt flag| 00000160 20 72 65 67 69 73 74 65 72 0d 00 64 2b 69 65 72 | register..d+ier| 00000170 3d 26 46 45 36 45 20 3a f4 3a 20 69 6e 74 65 72 |=&FE6E :.: inter| 00000180 72 75 70 74 20 65 6e 61 62 6c 65 20 72 65 67 69 |rupt enable regi| 00000190 73 74 65 72 0d 00 6e 10 6f 73 62 79 74 65 3d 26 |ster..n.osbyte=&| 000001a0 46 46 46 34 0d 00 78 14 e3 20 70 61 73 73 3d 30 |FFF4..x.. pass=0| 000001b0 20 b8 20 32 20 88 20 32 0d 00 82 0c 50 25 3d 6d | . 2 . 2....P%=m| 000001c0 63 6f 64 65 0d 00 8c 0d 5b 4f 50 54 20 70 61 73 |code....[OPT pas| 000001d0 73 0d 00 96 3a 4c 44 58 20 69 72 71 31 76 20 5c |s...:LDX irq1v \| 000001e0 20 63 75 72 72 65 6e 74 20 70 72 69 6d 61 72 79 | current primary| 000001f0 20 69 6e 74 65 72 72 75 70 74 20 76 65 63 74 6f | interrupt vecto| 00000200 72 2c 20 6c 6f 77 20 62 79 74 65 0d 00 a0 3d 4c |r, low byte...=L| 00000210 44 59 20 69 72 71 31 76 2b 31 20 5c 20 63 75 72 |DY irq1v+1 \ cur| 00000220 72 65 6e 74 20 70 72 69 6d 61 72 79 20 69 6e 74 |rent primary int| 00000230 65 72 72 75 70 74 20 76 65 63 74 6f 72 2c 20 68 |errupt vector, h| 00000240 69 67 68 20 62 79 74 65 0d 00 aa 2c 43 50 59 20 |igh byte...,CPY | 00000250 23 69 6e 74 65 72 72 75 70 74 20 81 20 32 35 36 |#interrupt . 256| 00000260 20 5c 20 63 6f 6d 70 61 72 65 20 68 69 67 68 20 | \ compare high | 00000270 62 79 74 65 0d 00 b4 2f 42 45 51 20 64 69 73 61 |byte.../BEQ disa| 00000280 62 6c 65 20 5c 20 72 65 73 74 6f 72 65 20 6f 6c |ble \ restore ol| 00000290 64 20 76 65 63 74 6f 72 20 69 66 20 61 6c 74 65 |d vector if alte| 000002a0 72 65 64 0d 00 be 36 53 54 58 20 6f 6c 64 69 72 |red...6STX oldir| 000002b0 71 31 76 20 5c 20 73 61 76 65 20 6f 72 69 67 69 |q1v \ save origi| 000002c0 6e 61 6c 20 69 72 71 31 20 76 65 63 74 6f 72 2c |nal irq1 vector,| 000002d0 20 6c 6f 77 20 62 79 74 65 0d 00 c8 39 53 54 59 | low byte...9STY| 000002e0 20 6f 6c 64 69 72 71 31 76 2b 31 20 5c 20 73 61 | oldirq1v+1 \ sa| 000002f0 76 65 20 6f 72 69 67 69 6e 61 6c 20 69 72 71 31 |ve original irq1| 00000300 20 76 65 63 74 6f 72 2c 20 68 69 67 68 20 62 79 | vector, high by| 00000310 74 65 0d 00 d2 33 4c 44 58 20 62 79 74 65 76 20 |te...3LDX bytev | 00000320 5c 20 4f 73 62 79 74 65 20 69 6e 64 69 72 65 63 |\ Osbyte indirec| 00000330 74 69 6f 6e 20 76 65 63 74 6f 72 2c 20 6c 6f 77 |tion vector, low| 00000340 20 62 79 74 65 0d 00 dc 36 4c 44 59 20 62 79 74 | byte...6LDY byt| 00000350 65 76 2b 31 20 5c 20 4f 73 62 79 74 65 20 69 6e |ev+1 \ Osbyte in| 00000360 64 69 72 65 63 74 69 6f 6e 20 76 65 63 74 6f 72 |direction vector| 00000370 2c 20 68 69 67 68 20 62 79 74 65 0d 00 e6 3b 53 |, high byte...;S| 00000380 54 58 20 6f 6c 64 62 79 74 65 76 20 5c 20 73 61 |TX oldbytev \ sa| 00000390 76 65 20 4f 73 62 79 74 65 20 69 6e 64 69 72 65 |ve Osbyte indire| 000003a0 63 74 69 6f 6e 20 76 65 63 74 6f 72 2c 20 6c 6f |ction vector, lo| 000003b0 77 20 62 79 74 65 0d 00 f0 3e 53 54 59 20 6f 6c |w byte...>STY ol| 000003c0 64 62 79 74 65 76 2b 31 20 5c 20 73 61 76 65 20 |dbytev+1 \ save | 000003d0 4f 73 62 79 74 65 20 69 6e 64 69 72 65 63 74 69 |Osbyte indirecti| 000003e0 6f 6e 20 76 65 63 74 6f 72 2c 20 68 69 67 68 20 |on vector, high | 000003f0 62 79 74 65 0d 00 fa 34 4c 44 58 20 23 69 6e 74 |byte...4LDX #int| 00000400 65 72 72 75 70 74 20 83 20 32 35 36 20 5c 20 6e |errupt . 256 \ n| 00000410 65 77 20 69 72 71 31 20 76 65 63 74 6f 72 2c 20 |ew irq1 vector, | 00000420 6c 6f 77 20 62 79 74 65 0d 01 04 35 4c 44 59 20 |low byte...5LDY | 00000430 23 69 6e 74 65 72 72 75 70 74 20 81 20 32 35 36 |#interrupt . 256| 00000440 20 5c 20 6e 65 77 20 69 72 71 31 20 76 65 63 74 | \ new irq1 vect| 00000450 6f 72 2c 20 68 69 67 68 20 62 79 74 65 0d 01 0e |or, high byte...| 00000460 24 53 45 49 20 5c 20 73 65 74 20 69 6e 74 65 72 |$SEI \ set inter| 00000470 72 75 70 74 20 64 69 73 61 62 6c 65 20 66 6c 61 |rupt disable fla| 00000480 67 0d 01 18 2b 53 54 58 20 69 72 71 31 76 20 5c |g...+STX irq1v \| 00000490 20 61 6c 74 65 72 20 69 72 71 31 20 76 65 63 74 | alter irq1 vect| 000004a0 6f 72 2c 20 6c 6f 77 20 62 79 74 65 0d 01 22 2e |or, low byte..".| 000004b0 53 54 59 20 69 72 71 31 76 2b 31 20 5c 20 61 6c |STY irq1v+1 \ al| 000004c0 74 65 72 20 69 72 71 31 20 76 65 63 74 6f 72 2c |ter irq1 vector,| 000004d0 20 68 69 67 68 20 62 79 74 65 0d 01 2c 26 43 4c | high byte..,&CL| 000004e0 49 20 5c 20 63 6c 65 61 72 20 69 6e 74 65 72 72 |I \ clear interr| 000004f0 75 70 74 20 64 69 73 61 62 6c 65 20 66 6c 61 67 |upt disable flag| 00000500 0d 01 36 41 4c 44 58 20 23 61 6e 61 6c 6f 67 75 |..6ALDX #analogu| 00000510 65 20 83 20 32 35 36 20 5c 20 6e 65 77 20 4f 73 |e . 256 \ new Os| 00000520 62 79 74 65 20 69 6e 64 69 72 65 63 74 69 6f 6e |byte indirection| 00000530 20 76 65 63 74 6f 72 2c 20 6c 6f 77 20 62 79 74 | vector, low byt| 00000540 65 0d 01 40 42 4c 44 59 20 23 61 6e 61 6c 6f 67 |e..@BLDY #analog| 00000550 75 65 20 81 20 32 35 36 20 5c 20 6e 65 77 20 4f |ue . 256 \ new O| 00000560 73 62 79 74 65 20 69 6e 64 69 72 65 63 74 69 6f |sbyte indirectio| 00000570 6e 20 76 65 63 74 6f 72 2c 20 68 69 67 68 20 62 |n vector, high b| 00000580 79 74 65 0d 01 4a 39 53 54 58 20 62 79 74 65 76 |yte..J9STX bytev| 00000590 20 5c 20 61 6c 74 65 72 20 4f 73 62 79 74 65 20 | \ alter Osbyte | 000005a0 69 6e 64 69 72 65 63 74 69 6f 6e 20 76 65 63 74 |indirection vect| 000005b0 6f 72 2c 20 6c 6f 77 20 62 79 74 65 0d 01 54 3c |or, low byte..T<| 000005c0 53 54 59 20 62 79 74 65 76 2b 31 20 5c 20 61 6c |STY bytev+1 \ al| 000005d0 74 65 72 20 4f 73 62 79 74 65 20 69 6e 64 69 72 |ter Osbyte indir| 000005e0 65 63 74 69 6f 6e 20 76 65 63 74 6f 72 2c 20 68 |ection vector, h| 000005f0 69 67 68 20 62 79 74 65 0d 01 5e 2a 4c 44 41 20 |igh byte..^*LDA | 00000600 23 26 39 38 20 5c 20 25 31 30 30 31 31 30 30 30 |#&98 \ %10011000| 00000610 2c 20 69 65 2e 20 65 6e 61 62 6c 65 20 43 42 31 |, ie. enable CB1| 00000620 2f 32 0d 01 68 27 53 54 41 20 69 65 72 20 5c 20 |/2..h'STA ier \ | 00000630 69 6e 74 65 72 72 75 70 74 20 65 6e 61 62 6c 65 |interrupt enable| 00000640 20 72 65 67 69 73 74 65 72 0d 01 72 29 4c 44 41 | register..r)LDA| 00000650 20 70 63 72 20 5c 20 70 65 72 69 70 68 65 72 61 | pcr \ periphera| 00000660 6c 20 63 6f 6e 74 72 6f 6c 20 72 65 67 69 73 74 |l control regist| 00000670 65 72 0d 01 7c 30 80 20 23 26 30 46 20 5c 20 80 |er..|0. #&0F \ .| 00000680 20 77 69 74 68 20 25 30 30 30 30 31 31 31 31 2c | with %00001111,| 00000690 20 69 65 20 63 6c 65 61 72 20 62 69 74 73 20 34 | ie clear bits 4| 000006a0 2d 37 0d 01 86 34 84 41 20 23 26 35 30 20 5c 20 |-7...4.A #&50 \ | 000006b0 84 20 77 69 74 68 20 25 30 31 30 31 30 30 30 30 |. with %01010000| 000006c0 2c 20 69 65 2e 20 73 65 74 20 62 69 74 73 20 34 |, ie. set bits 4| 000006d0 20 61 6e 64 20 36 0d 01 90 42 53 54 41 20 70 63 | and 6...BSTA pc| 000006e0 72 20 5c 20 69 6e 74 65 72 72 75 70 74 20 6f 6e |r \ interrupt on| 000006f0 20 2b 76 65 20 74 72 61 6e 73 69 74 69 6f 6e 2c | +ve transition,| 00000700 20 43 42 32 20 69 6e 70 75 74 2c 20 44 52 42 20 | CB2 input, DRB | 00000710 74 6f 20 63 6c 65 61 72 0d 01 9a 1e 4c 44 41 20 |to clear....LDA | 00000720 23 26 30 30 20 5c 20 75 73 65 72 20 70 6f 72 74 |#&00 \ user port| 00000730 20 69 6e 70 75 74 0d 01 a4 28 53 54 41 20 64 64 | input...(STA dd| 00000740 72 62 20 5c 20 64 61 74 61 20 64 69 72 65 63 74 |rb \ data direct| 00000750 69 6f 6e 20 72 65 67 69 73 74 65 72 20 42 0d 01 |ion register B..| 00000760 ae 21 4c 44 41 20 23 26 31 30 20 5c 20 41 44 43 |.!LDA #&10 \ ADC| 00000770 20 63 68 61 6e 6e 65 6c 20 73 65 6c 65 63 74 0d | channel select.| 00000780 01 b8 20 4c 44 58 20 23 26 30 30 20 5c 20 73 61 |.. LDX #&00 \ sa| 00000790 6d 70 6c 69 6e 67 20 64 69 73 61 62 6c 65 64 0d |mpling disabled.| 000007a0 01 c2 2b 4a 4d 50 20 6f 73 62 79 74 65 20 5c 20 |..+JMP osbyte \ | 000007b0 4f 73 62 79 74 65 20 61 6e 64 20 72 65 74 75 72 |Osbyte and retur| 000007c0 6e 20 74 6f 20 42 41 53 49 43 0d 01 cc 0c 2e 64 |n to BASIC.....d| 000007d0 69 73 61 62 6c 65 0d 01 d6 36 4c 44 41 20 23 26 |isable...6LDA #&| 000007e0 31 38 20 5c 20 25 30 30 30 31 31 30 30 30 2c 20 |18 \ %00011000, | 000007f0 74 6f 20 63 6c 65 61 72 20 62 69 74 73 20 33 20 |to clear bits 3 | 00000800 61 6e 64 20 34 20 6f 66 20 69 65 72 0d 01 e0 31 |and 4 of ier...1| 00000810 4c 44 58 20 6f 6c 64 69 72 71 31 76 20 5c 20 6f |LDX oldirq1v \ o| 00000820 72 69 67 69 6e 61 6c 20 31 72 71 31 20 76 65 63 |riginal 1rq1 vec| 00000830 74 6f 72 2c 20 6c 6f 77 20 62 79 74 65 0d 01 ea |tor, low byte...| 00000840 34 4c 44 59 20 6f 6c 64 69 72 71 31 76 2b 31 20 |4LDY oldirq1v+1 | 00000850 5c 20 6f 72 69 67 69 6e 61 6c 20 69 72 71 31 20 |\ original irq1 | 00000860 76 65 63 74 6f 72 2c 20 68 69 67 68 20 62 79 74 |vector, high byt| 00000870 65 0d 01 f4 24 53 45 49 20 5c 20 73 65 74 20 69 |e...$SEI \ set i| 00000880 6e 74 65 72 72 75 70 74 20 64 69 73 61 62 6c 65 |nterrupt disable| 00000890 20 66 6c 61 67 0d 01 fe 27 53 54 41 20 69 65 72 | flag...'STA ier| 000008a0 20 5c 20 69 6e 74 65 72 72 75 70 74 20 65 6e 61 | \ interrupt ena| 000008b0 62 6c 65 20 72 65 67 69 73 74 65 72 0d 02 08 29 |ble register...)| 000008c0 4c 44 41 20 70 63 72 20 5c 20 70 65 72 69 70 68 |LDA pcr \ periph| 000008d0 65 72 61 6c 20 63 6f 6e 74 72 6f 6c 20 72 65 67 |eral control reg| 000008e0 69 73 74 65 72 0d 02 12 31 80 20 23 26 30 46 20 |ister...1. #&0F | 000008f0 5c 20 80 20 77 69 74 68 20 25 30 30 30 30 31 31 |\ . with %000011| 00000900 31 31 2c 20 69 65 2e 20 63 6c 65 61 72 20 62 69 |11, ie. clear bi| 00000910 74 73 20 34 2d 37 0d 02 1c 29 53 54 41 20 70 63 |ts 4-7...)STA pc| 00000920 72 20 5c 20 70 65 72 69 70 68 65 72 61 6c 20 63 |r \ peripheral c| 00000930 6f 6e 74 72 6f 6c 20 72 65 67 69 73 74 65 72 0d |ontrol register.| 00000940 02 26 3a 53 54 58 20 69 72 71 31 76 20 5c 20 72 |.&:STX irq1v \ r| 00000950 65 73 74 6f 72 65 20 74 68 65 20 6f 72 69 67 69 |estore the origi| 00000960 6e 61 6c 20 69 72 71 31 20 76 65 63 74 6f 72 2c |nal irq1 vector,| 00000970 20 6c 6f 77 20 62 79 74 65 0d 02 30 3d 53 54 59 | low byte..0=STY| 00000980 20 69 72 71 31 76 2b 31 20 5c 20 72 65 73 74 6f | irq1v+1 \ resto| 00000990 72 65 20 74 68 65 20 6f 72 69 67 69 6e 61 6c 20 |re the original | 000009a0 69 72 71 31 20 76 65 63 74 6f 72 2c 20 68 69 67 |irq1 vector, hig| 000009b0 68 20 62 79 74 65 0d 02 3a 26 43 4c 49 20 5c 20 |h byte..:&CLI \ | 000009c0 63 6c 65 61 72 20 69 6e 74 65 72 72 75 70 74 20 |clear interrupt | 000009d0 64 69 73 61 62 6c 65 20 66 6c 61 67 0d 02 44 3f |disable flag..D?| 000009e0 4c 44 58 20 6f 6c 64 62 79 74 65 76 20 5c 20 6f |LDX oldbytev \ o| 000009f0 72 69 67 69 6e 61 6c 20 4f 73 62 79 74 65 20 69 |riginal Osbyte i| 00000a00 6e 64 69 72 65 63 74 69 6f 6e 20 76 65 63 74 6f |ndirection vecto| 00000a10 72 2c 20 6c 6f 77 20 62 79 74 65 0d 02 4e 42 4c |r, low byte..NBL| 00000a20 44 59 20 6f 6c 64 62 79 74 65 76 2b 31 20 5c 20 |DY oldbytev+1 \ | 00000a30 6f 72 69 67 69 6e 61 6c 20 4f 73 62 79 74 65 20 |original Osbyte | 00000a40 69 6e 64 69 72 65 63 74 69 6f 6e 20 76 65 63 74 |indirection vect| 00000a50 6f 72 2c 20 68 69 67 68 20 62 79 74 65 0d 02 58 |or, high byte..X| 00000a60 33 53 54 58 20 62 79 74 65 76 20 5c 20 72 65 73 |3STX bytev \ res| 00000a70 74 6f 72 65 20 74 68 65 20 4f 73 62 79 74 65 20 |tore the Osbyte | 00000a80 76 65 63 74 6f 72 2c 20 6c 6f 77 20 62 79 74 65 |vector, low byte| 00000a90 0d 02 62 36 53 54 59 20 62 79 74 65 76 2b 31 20 |..b6STY bytev+1 | 00000aa0 5c 20 72 65 73 74 6f 72 65 20 74 68 65 20 4f 73 |\ restore the Os| 00000ab0 62 79 74 65 20 76 65 63 74 6f 72 2c 20 68 69 67 |byte vector, hig| 00000ac0 68 20 62 79 74 65 0d 02 6c 21 4c 44 41 20 23 26 |h byte..l!LDA #&| 00000ad0 31 30 20 5c 20 73 65 6c 65 63 74 20 41 44 43 20 |10 \ select ADC | 00000ae0 63 68 61 6e 6e 65 6c 0d 02 76 27 4c 44 58 20 23 |channel..v'LDX #| 00000af0 26 30 34 20 5c 20 34 20 63 68 61 6e 6e 65 6c 73 |&04 \ 4 channels| 00000b00 20 74 6f 20 62 65 20 73 61 6d 70 6c 65 64 0d 02 | to be sampled..| 00000b10 80 2b 4a 4d 50 20 6f 73 62 79 74 65 20 5c 20 4f |.+JMP osbyte \ O| 00000b20 73 62 79 74 65 20 61 6e 64 20 72 65 74 75 72 6e |sbyte and return| 00000b30 20 74 6f 20 42 41 53 49 43 0d 02 8a 0e 2e 69 6e | to BASIC.....in| 00000b40 74 65 72 72 75 70 74 0d 02 94 35 4c 44 41 20 73 |terrupt...5LDA s| 00000b50 61 76 65 72 65 67 20 5c 20 69 6e 74 65 72 72 75 |avereg \ interru| 00000b60 70 74 20 61 63 63 75 6d 75 6c 61 74 6f 72 20 73 |pt accumulator s| 00000b70 61 76 65 20 72 65 67 69 73 74 65 72 0d 02 9e 22 |ave register..."| 00000b80 50 48 41 20 5c 20 61 6e 64 20 70 75 73 68 20 69 |PHA \ and push i| 00000b90 74 20 6f 6e 20 74 68 65 20 73 74 61 63 6b 0d 02 |t on the stack..| 00000ba0 a8 25 4c 44 41 20 69 66 72 20 5c 20 69 6e 74 65 |.%LDA ifr \ inte| 00000bb0 72 72 75 70 74 20 66 6c 61 67 20 72 65 67 69 73 |rrupt flag regis| 00000bc0 74 65 72 0d 02 b2 31 42 50 4c 20 6e 6f 74 75 73 |ter...1BPL notus| 00000bd0 65 72 20 5c 20 62 69 74 20 37 20 69 73 20 73 65 |er \ bit 7 is se| 00000be0 74 20 69 66 20 56 49 41 2d 42 20 69 6e 74 65 72 |t if VIA-B inter| 00000bf0 72 75 70 74 0d 02 bc 34 80 20 23 26 31 38 20 5c |rupt...4. #&18 \| 00000c00 20 80 20 77 69 74 68 20 25 30 30 30 31 31 30 30 | . with %0001100| 00000c10 30 2c 20 69 65 2e 20 74 65 73 74 20 62 69 74 73 |0, ie. test bits| 00000c20 20 33 20 61 6e 64 20 34 0d 02 c6 28 42 45 51 20 | 3 and 4...(BEQ | 00000c30 6e 6f 74 75 73 65 72 20 5c 20 65 78 69 74 20 69 |notuser \ exit i| 00000c40 66 20 6e 6f 74 20 43 42 31 20 6f 72 20 43 42 32 |f not CB1 or CB2| 00000c50 0d 02 d0 2b 80 20 23 26 31 30 20 5c 20 80 20 77 |...+. #&10 \ . w| 00000c60 69 74 68 20 25 30 30 30 31 30 30 30 30 2c 20 69 |ith %00010000, i| 00000c70 65 2e 20 74 65 73 74 20 43 42 31 0d 02 da 36 42 |e. test CB1...6B| 00000c80 4e 45 20 78 70 75 6c 73 65 20 5c 20 62 69 74 20 |NE xpulse \ bit | 00000c90 34 20 73 65 74 20 66 6f 72 20 61 6e 20 58 20 64 |4 set for an X d| 00000ca0 69 72 65 63 74 69 6f 6e 20 6d 6f 76 65 6d 65 6e |irection movemen| 00000cb0 74 0d 02 e4 1d 4c 44 41 20 64 72 62 20 5c 20 64 |t....LDA drb \ d| 00000cc0 61 74 61 20 72 65 67 69 73 74 65 72 20 42 0d 02 |ata register B..| 00000cd0 ee 2d 80 20 23 26 30 34 20 5c 20 80 20 77 69 74 |.-. #&04 \ . wit| 00000ce0 68 20 25 30 30 30 30 30 31 30 30 2c 20 69 65 2e |h %00000100, ie.| 00000cf0 20 74 65 73 74 20 62 69 74 20 32 0d 02 f8 34 42 | test bit 2...4B| 00000d00 4e 45 20 79 64 6f 77 6e 20 5c 20 69 66 20 62 69 |NE ydown \ if bi| 00000d10 74 20 32 20 69 73 20 73 65 74 20 74 68 65 6e 20 |t 2 is set then | 00000d20 59 20 69 73 20 67 6f 69 6e 67 20 64 6f 77 6e 0d |Y is going down.| 00000d30 03 02 38 49 4e 43 20 79 63 6f 6f 72 64 20 5c 20 |..8INC ycoord \ | 00000d40 59 20 69 73 20 67 6f 69 6e 67 20 75 70 20 73 6f |Y is going up so| 00000d50 20 69 6e 63 72 65 6d 65 6e 74 20 59 20 63 6f 6f | increment Y coo| 00000d60 72 64 69 6e 61 74 65 0d 03 0c 2e 42 4e 45 20 65 |rdinate....BNE e| 00000d70 78 69 74 20 5c 20 62 72 61 6e 63 68 20 69 66 20 |xit \ branch if | 00000d80 69 6e 20 74 68 65 20 72 61 6e 67 65 20 31 20 74 |in the range 1 t| 00000d90 6f 20 32 35 35 0d 03 16 28 42 45 51 20 64 65 63 |o 255...(BEQ dec| 00000da0 79 20 5c 20 69 66 20 7a 65 72 6f 20 74 68 65 6e |y \ if zero then| 00000db0 20 61 6c 74 65 72 20 74 6f 20 32 35 35 0d 03 20 | alter to 255.. | 00000dc0 0a 2e 79 64 6f 77 6e 0d 03 2a 22 4c 44 41 20 79 |..ydown..*"LDA y| 00000dd0 63 6f 6f 72 64 20 5c 20 6c 6f 61 64 20 59 20 63 |coord \ load Y c| 00000de0 6f 6f 72 64 69 6e 61 74 65 0d 03 34 3b 42 45 51 |oordinate..4;BEQ| 00000df0 20 65 78 69 74 20 5c 20 62 72 61 6e 63 68 20 69 | exit \ branch i| 00000e00 66 20 7a 65 72 6f 20 62 65 63 61 75 73 65 20 69 |f zero because i| 00000e10 74 20 63 61 6e 27 74 20 67 6f 20 61 6e 79 20 6c |t can't go any l| 00000e20 6f 77 65 72 0d 03 3e 09 2e 64 65 63 79 0d 03 48 |ower..>..decy..H| 00000e30 29 44 45 43 20 79 63 6f 6f 72 64 20 5c 20 72 65 |)DEC ycoord \ re| 00000e40 64 75 63 65 20 59 20 63 6f 6f 72 64 69 6e 61 74 |duce Y coordinat| 00000e50 65 20 62 79 20 31 0d 03 52 42 4a 4d 50 20 65 78 |e by 1..RBJMP ex| 00000e60 69 74 20 5c 20 72 65 73 74 6f 72 65 20 69 6e 74 |it \ restore int| 00000e70 65 72 72 75 70 74 20 61 63 63 75 6d 75 6c 61 74 |errupt accumulat| 00000e80 6f 72 20 73 61 76 65 20 72 65 67 69 73 74 65 72 |or save register| 00000e90 20 61 6e 64 20 52 54 49 0d 03 5c 0b 2e 78 70 75 | and RTI..\..xpu| 00000ea0 6c 73 65 0d 03 66 1d 4c 44 41 20 64 72 62 20 5c |lse..f.LDA drb \| 00000eb0 20 64 61 74 61 20 72 65 67 69 73 74 65 72 20 42 | data register B| 00000ec0 0d 03 70 1c 52 4f 52 20 41 20 5c 20 62 69 74 20 |..p.ROR A \ bit | 00000ed0 30 20 69 6e 74 6f 20 63 61 72 72 79 0d 03 7a 53 |0 into carry..zS| 00000ee0 42 43 43 20 78 64 6f 77 6e 20 5c 20 58 20 69 73 |BCC xdown \ X is| 00000ef0 20 67 6f 69 6e 67 20 64 6f 77 6e 20 69 66 20 62 | going down if b| 00000f00 69 74 20 30 20 69 73 20 73 65 74 20 2d 20 62 75 |it 0 is set - bu| 00000f10 74 20 66 75 64 67 65 20 66 6f 72 20 6a 6f 79 73 |t fudge for joys| 00000f20 74 69 63 6b 20 73 69 6d 75 6c 61 74 69 6f 6e 0d |tick simulation.| 00000f30 03 84 54 49 4e 43 20 78 63 6f 6f 72 64 20 5c 20 |..TINC xcoord \ | 00000f40 58 20 69 73 20 67 6f 69 6e 67 20 75 70 20 69 66 |X is going up if| 00000f50 20 62 69 74 20 30 20 69 73 20 63 6c 65 61 72 20 | bit 0 is clear | 00000f60 2d 20 62 75 74 20 66 75 64 67 65 20 66 6f 72 20 |- but fudge for | 00000f70 6a 6f 79 73 74 69 63 6b 20 73 69 6d 75 6c 61 74 |joystick simulat| 00000f80 69 6f 6e 0d 03 8e 41 42 4e 45 20 65 78 69 74 20 |ion...ABNE exit | 00000f90 5c 20 65 78 69 74 20 69 66 20 58 20 63 6f 6f 72 |\ exit if X coor| 00000fa0 64 69 6e 61 74 65 20 69 73 20 69 6e 20 74 68 65 |dinate is in the| 00000fb0 20 72 61 6e 67 65 20 66 72 6f 6d 20 31 20 74 6f | range from 1 to| 00000fc0 20 32 35 35 0d 03 98 33 42 45 51 20 64 65 63 78 | 255...3BEQ decx| 00000fd0 20 5c 20 69 66 20 58 20 63 6f 6f 72 64 69 6e 61 | \ if X coordina| 00000fe0 74 65 20 3d 20 30 20 74 68 65 6e 20 6d 61 6b 65 |te = 0 then make| 00000ff0 20 69 74 20 32 35 35 0d 03 a2 0a 2e 78 64 6f 77 | it 255.....xdow| 00001000 6e 0d 03 ac 22 4c 44 41 20 78 63 6f 6f 72 64 20 |n..."LDA xcoord | 00001010 5c 20 6c 6f 61 64 20 58 20 63 6f 6f 72 64 69 6e |\ load X coordin| 00001020 61 74 65 0d 03 b6 32 42 45 51 20 65 78 69 74 20 |ate...2BEQ exit | 00001030 5c 20 69 66 20 69 74 20 69 73 20 7a 65 72 6f 20 |\ if it is zero | 00001040 69 74 20 63 61 6e 27 74 20 67 6f 20 61 6e 79 20 |it can't go any | 00001050 6c 6f 77 65 72 0d 03 c0 09 2e 64 65 63 78 0d 03 |lower.....decx..| 00001060 ca 2b 44 45 43 20 78 63 6f 6f 72 64 20 5c 20 64 |.+DEC xcoord \ d| 00001070 65 63 72 65 61 73 65 20 58 20 63 6f 6f 72 64 69 |ecrease X coordi| 00001080 6e 61 74 65 20 62 79 20 31 0d 03 d4 09 2e 65 78 |nate by 1.....ex| 00001090 69 74 0d 03 de 40 50 4c 41 20 5c 20 70 75 6c 6c |it...@PLA \ pull| 000010a0 20 69 6e 74 65 72 72 75 70 74 20 61 63 63 75 6d | interrupt accum| 000010b0 75 6c 61 74 6f 72 20 73 61 76 65 20 72 65 67 69 |ulator save regi| 000010c0 73 74 65 72 20 6f 66 66 20 74 68 65 20 73 74 61 |ster off the sta| 000010d0 63 6b 0d 03 e8 27 53 54 41 20 73 61 76 65 72 65 |ck...'STA savere| 000010e0 67 20 5c 20 61 6e 64 20 72 65 73 74 6f 72 65 20 |g \ and restore | 000010f0 7a 65 72 6f 20 70 61 67 65 0d 03 f2 1f 52 54 49 |zero page....RTI| 00001100 20 5c 20 72 65 74 75 72 6e 20 66 72 6f 6d 20 69 | \ return from i| 00001110 6e 74 65 72 72 75 70 74 0d 03 fc 0c 2e 6e 6f 74 |nterrupt.....not| 00001120 75 73 65 72 0d 04 06 44 50 4c 41 20 5c 20 70 75 |user...DPLA \ pu| 00001130 6c 6c 20 74 68 65 20 69 6e 74 65 72 72 75 70 74 |ll the interrupt| 00001140 20 61 63 63 75 6d 75 6c 61 74 6f 72 20 73 61 76 | accumulator sav| 00001150 65 20 72 65 67 69 73 74 65 72 20 6f 66 66 20 74 |e register off t| 00001160 68 65 20 73 74 61 63 6b 0d 04 10 2f 53 54 41 20 |he stack.../STA | 00001170 73 61 76 65 72 65 67 20 5c 20 72 65 73 74 6f 72 |savereg \ restor| 00001180 65 20 74 68 65 20 7a 65 72 6f 20 70 61 67 65 20 |e the zero page | 00001190 61 64 64 72 65 73 73 0d 04 1a 31 4a 4d 50 20 28 |address...1JMP (| 000011a0 6f 6c 64 69 72 71 31 76 29 20 5c 20 65 78 69 74 |oldirq1v) \ exit| 000011b0 20 76 69 61 20 74 68 65 20 6f 72 69 67 69 6e 61 | via the origina| 000011c0 6c 20 76 65 63 74 6f 72 0d 04 24 0d 2e 61 6e 61 |l vector..$..ana| 000011d0 6c 6f 67 75 65 0d 04 2e 22 50 48 50 20 5c 20 70 |logue..."PHP \ p| 000011e0 75 73 68 20 74 68 65 20 73 74 61 74 75 73 20 72 |ush the status r| 000011f0 65 67 69 73 74 65 72 0d 04 38 42 43 4d 50 20 23 |egister..8BCMP #| 00001200 26 38 30 20 5c 20 4f 73 62 79 74 65 20 26 38 30 |&80 \ Osbyte &80| 00001210 20 69 73 20 72 65 61 64 20 41 44 43 20 63 68 61 | is read ADC cha| 00001220 6e 6e 65 6c 20 6f 72 20 67 65 74 20 62 75 66 66 |nnel or get buff| 00001230 65 72 20 73 74 61 74 75 73 0d 04 42 2b 42 4e 45 |er status..B+BNE| 00001240 20 6f 6c 64 61 64 76 61 6c 20 5c 20 62 72 61 6e | oldadval \ bran| 00001250 63 68 20 69 66 20 6e 6f 74 20 4f 73 62 79 74 65 |ch if not Osbyte| 00001260 20 26 38 30 0d 04 4c 32 43 50 58 20 23 26 30 30 | &80..L2CPX #&00| 00001270 20 5c 20 69 73 20 74 68 69 73 20 96 28 30 29 20 | \ is this .(0) | 00001280 69 65 2e 20 72 65 61 64 20 66 69 72 65 20 62 75 |ie. read fire bu| 00001290 74 74 6f 6e 73 3f 0d 04 56 3a 42 45 51 20 66 69 |ttons?..V:BEQ fi| 000012a0 72 65 62 75 74 74 6f 6e 73 20 5c 20 62 72 61 6e |rebuttons \ bran| 000012b0 63 68 20 74 6f 20 73 69 6d 75 6c 61 74 65 20 72 |ch to simulate r| 000012c0 65 61 64 20 66 69 72 65 20 62 75 74 74 6f 6e 73 |ead fire buttons| 000012d0 0d 04 60 3d 42 50 4c 20 6e 65 77 61 64 76 61 6c |..`=BPL newadval| 000012e0 20 5c 20 69 66 20 58 20 3d 20 31 20 74 6f 20 34 | \ if X = 1 to 4| 000012f0 20 74 68 65 6e 20 73 69 6d 75 6c 61 74 65 20 41 | then simulate A| 00001300 44 43 20 63 6f 6e 76 65 72 73 69 6f 6e 0d 04 6a |DC conversion..j| 00001310 0d 2e 6f 6c 64 61 64 76 61 6c 0d 04 74 1e 50 4c |..oldadval..t.PL| 00001320 50 20 5c 20 70 75 6c 6c 20 73 74 61 74 75 73 20 |P \ pull status | 00001330 72 65 67 69 73 74 65 72 0d 04 7e 0d 2e 6f 72 69 |register..~..ori| 00001340 67 69 6e 61 6c 0d 04 88 34 4a 4d 50 20 28 6f 6c |ginal...4JMP (ol| 00001350 64 62 79 74 65 76 29 20 5c 20 65 78 69 74 20 76 |dbytev) \ exit v| 00001360 69 61 20 6f 72 69 67 69 6e 61 6c 20 4f 73 62 79 |ia original Osby| 00001370 74 65 20 76 65 63 74 6f 72 0d 04 92 0d 2e 6e 65 |te vector.....ne| 00001380 77 61 64 76 61 6c 0d 04 9c 2c 54 58 41 20 5c 20 |wadval...,TXA \ | 00001390 58 20 63 6f 6e 74 61 69 6e 73 20 63 68 61 6e 6e |X contains chann| 000013a0 65 6c 20 6e 75 6d 62 65 72 20 28 31 20 74 6f 20 |el number (1 to | 000013b0 34 29 0d 04 a6 1c 52 4f 52 20 41 20 5c 20 62 69 |4)....ROR A \ bi| 000013c0 74 20 30 20 69 6e 74 6f 20 63 61 72 72 79 0d 04 |t 0 into carry..| 000013d0 b0 22 4c 44 41 20 79 63 6f 6f 72 64 20 5c 20 6c |."LDA ycoord \ l| 000013e0 6f 61 64 20 59 20 63 6f 6f 72 64 69 6e 61 74 65 |oad Y coordinate| 000013f0 0d 04 ba 2b 42 43 43 20 73 6b 69 70 78 63 6f 6f |...+BCC skipxcoo| 00001400 72 64 20 5c 20 62 72 61 6e 63 68 20 69 66 20 96 |rd \ branch if .| 00001410 28 31 29 20 6f 72 20 96 28 33 29 0d 04 c4 22 4c |(1) or .(3)..."L| 00001420 44 41 20 78 63 6f 6f 72 64 20 5c 20 6c 6f 61 64 |DA xcoord \ load| 00001430 20 58 20 63 6f 6f 72 64 69 6e 61 74 65 0d 04 ce | X coordinate...| 00001440 0f 2e 73 6b 69 70 78 63 6f 6f 72 64 0d 04 d8 2f |..skipxcoord.../| 00001450 54 41 59 20 5c 20 59 20 3d 20 68 69 67 68 20 62 |TAY \ Y = high b| 00001460 79 74 65 20 6f 66 20 31 36 20 62 69 74 20 73 69 |yte of 16 bit si| 00001470 6d 75 6c 61 74 65 64 20 41 44 43 0d 04 e2 31 80 |mulated ADC...1.| 00001480 20 23 26 46 30 20 5c 20 80 20 77 69 74 68 20 25 | #&F0 \ . with %| 00001490 31 31 31 31 30 30 30 30 2c 20 69 65 2e 20 63 6c |11110000, ie. cl| 000014a0 65 61 72 20 62 69 74 73 20 30 2d 33 0d 04 ec 2e |ear bits 0-3....| 000014b0 54 41 58 20 5c 20 58 20 3d 20 6c 6f 77 20 62 79 |TAX \ X = low by| 000014c0 74 65 20 6f 66 20 31 36 20 62 69 74 20 73 69 6d |te of 16 bit sim| 000014d0 75 6c 61 74 65 64 20 41 44 43 0d 04 f6 19 4c 44 |ulated ADC....LD| 000014e0 41 20 23 26 38 30 20 5c 20 4f 73 62 79 74 65 20 |A #&80 \ Osbyte | 000014f0 26 38 30 0d 05 00 21 50 4c 50 20 5c 20 72 65 73 |&80...!PLP \ res| 00001500 74 6f 72 65 20 73 74 61 74 75 73 20 72 65 67 69 |tore status regi| 00001510 73 74 65 72 0d 05 0a 19 52 54 53 20 5c 20 72 65 |ster....RTS \ re| 00001520 74 75 72 6e 20 74 6f 20 42 41 53 49 43 0d 05 14 |turn to BASIC...| 00001530 10 2e 66 69 72 65 62 75 74 74 6f 6e 73 0d 05 1e |..firebuttons...| 00001540 2c 4a 53 52 20 6f 72 69 67 69 6e 61 6c 20 5c 20 |,JSR original \ | 00001550 70 65 72 66 6f 72 6d 20 74 68 65 20 6f 72 69 67 |perform the orig| 00001560 69 6e 61 6c 20 96 28 30 29 0d 05 28 30 54 58 41 |inal .(0)..(0TXA| 00001570 20 5c 20 72 65 73 75 6c 74 20 6f 66 20 72 65 61 | \ result of rea| 00001580 64 69 6e 67 20 66 69 72 65 20 62 75 74 74 6f 6e |ding fire button| 00001590 73 20 69 73 20 69 6e 20 58 0d 05 32 10 50 48 41 |s is in X..2.PHA| 000015a0 20 5c 20 70 75 73 68 20 58 0d 05 3c 1d 4c 44 41 | \ push X..<.LDA| 000015b0 20 64 72 62 20 5c 20 64 61 74 61 20 72 65 67 69 | drb \ data regi| 000015c0 73 74 65 72 20 42 0d 05 46 1c 52 4f 4c 20 41 20 |ster B..F.ROL A | 000015d0 5c 20 62 69 74 20 37 20 69 6e 74 6f 20 63 61 72 |\ bit 7 into car| 000015e0 72 79 0d 05 50 32 42 43 43 20 72 69 67 68 74 20 |ry..P2BCC right | 000015f0 5c 20 62 69 74 20 37 20 63 6c 65 61 72 20 3d 20 |\ bit 7 clear = | 00001600 72 69 67 68 74 20 62 75 74 74 6f 6e 20 70 72 65 |right button pre| 00001610 73 73 65 64 0d 05 5a 1c 52 4f 4c 20 41 20 5c 20 |ssed..Z.ROL A \ | 00001620 62 69 74 20 36 20 69 6e 74 6f 20 63 61 72 72 79 |bit 6 into carry| 00001630 0d 05 64 34 42 43 43 20 63 65 6e 74 72 65 20 5c |..d4BCC centre \| 00001640 20 62 69 74 20 36 20 63 6c 65 61 72 20 3d 20 63 | bit 6 clear = c| 00001650 65 6e 74 72 65 20 62 75 74 74 6f 6e 20 70 72 65 |entre button pre| 00001660 73 73 65 64 0d 05 6e 1c 52 4f 4c 20 41 20 5c 20 |ssed..n.ROL A \ | 00001670 62 69 74 20 35 20 69 6e 74 6f 20 63 61 72 72 79 |bit 5 into carry| 00001680 0d 05 78 4d 42 43 53 20 6e 6f 70 72 65 73 73 20 |..xMBCS nopress | 00001690 5c 20 62 69 74 20 35 20 73 65 74 20 3d 20 6e 6f |\ bit 5 set = no| 000016a0 20 62 75 74 74 6f 6e 73 20 70 72 65 73 73 65 64 | buttons pressed| 000016b0 2c 20 63 6c 65 61 72 20 3d 20 6c 65 66 74 20 62 |, clear = left b| 000016c0 75 74 74 6f 6e 20 70 72 65 73 73 65 64 0d 05 82 |utton pressed...| 000016d0 21 50 4c 41 20 5c 20 70 75 6c 6c 20 74 68 65 20 |!PLA \ pull the | 000016e0 72 65 73 75 6c 74 20 6f 66 20 96 28 30 29 0d 05 |result of .(0)..| 000016f0 8c 17 84 41 20 23 26 30 31 20 5c 20 73 65 74 20 |...A #&01 \ set | 00001700 62 69 74 20 30 0d 05 96 24 42 4e 45 20 67 65 74 |bit 0...$BNE get| 00001710 6f 75 74 20 5c 20 61 6e 64 20 72 65 74 75 72 6e |out \ and return| 00001720 20 74 6f 20 42 41 53 49 43 0d 05 a0 0a 2e 72 69 | to BASIC.....ri| 00001730 67 68 74 0d 05 aa 21 50 4c 41 20 5c 20 70 75 6c |ght...!PLA \ pul| 00001740 6c 20 74 68 65 20 72 65 73 75 6c 74 20 6f 66 20 |l the result of | 00001750 96 28 30 29 0d 05 b4 17 84 41 20 23 26 30 32 20 |.(0).....A #&02 | 00001760 5c 20 73 65 74 20 62 69 74 20 31 0d 05 be 24 42 |\ set bit 1...$B| 00001770 4e 45 20 67 65 74 6f 75 74 20 5c 20 61 6e 64 20 |NE getout \ and | 00001780 72 65 74 75 72 6e 20 74 6f 20 42 41 53 49 43 0d |return to BASIC.| 00001790 05 c8 0b 2e 63 65 6e 74 72 65 0d 05 d2 21 50 4c |....centre...!PL| 000017a0 41 20 5c 20 70 75 6c 6c 20 74 68 65 20 72 65 73 |A \ pull the res| 000017b0 75 6c 74 20 6f 66 20 96 28 30 29 0d 05 dc 1e 84 |ult of .(0).....| 000017c0 41 20 23 26 30 33 20 5c 20 73 65 74 20 62 69 74 |A #&03 \ set bit| 000017d0 73 20 30 20 61 6e 64 20 31 0d 05 e6 24 42 4e 45 |s 0 and 1...$BNE| 000017e0 20 67 65 74 6f 75 74 20 5c 20 61 6e 64 20 72 65 | getout \ and re| 000017f0 74 75 72 6e 20 74 6f 20 42 41 53 49 43 0d 05 f0 |turn to BASIC...| 00001800 0c 2e 6e 6f 70 72 65 73 73 0d 05 fa 21 50 4c 41 |..nopress...!PLA| 00001810 20 5c 20 70 75 6c 6c 20 74 68 65 20 72 65 73 75 | \ pull the resu| 00001820 6c 74 20 6f 66 20 96 28 30 29 0d 06 04 0b 2e 67 |lt of .(0).....g| 00001830 65 74 6f 75 74 0d 06 0e 24 54 41 58 20 5c 20 72 |etout...$TAX \ r| 00001840 65 73 75 6c 74 20 62 79 65 20 69 6e 74 6f 20 58 |esult bye into X| 00001850 20 72 65 67 69 73 74 65 72 0d 06 18 19 4c 44 41 | register....LDA| 00001860 20 23 26 38 30 20 5c 20 4f 73 62 79 74 65 20 26 | #&80 \ Osbyte &| 00001870 38 30 0d 06 22 21 50 4c 50 20 5c 20 72 65 73 74 |80.."!PLP \ rest| 00001880 6f 72 65 20 73 74 61 74 75 73 20 72 65 67 69 73 |ore status regis| 00001890 74 65 72 0d 06 2c 19 52 54 53 20 5c 20 72 65 74 |ter..,.RTS \ ret| 000018a0 75 72 6e 20 74 6f 20 42 41 53 49 43 0d 06 36 0d |urn to BASIC..6.| 000018b0 2e 6f 6c 64 69 72 71 31 76 0d 06 40 23 45 51 55 |.oldirq1v..@#EQU| 000018c0 57 20 26 30 30 20 5c 20 6f 72 69 67 69 6e 61 6c |W &00 \ original| 000018d0 20 69 72 71 31 20 76 65 63 74 6f 72 0d 06 4a 0d | irq1 vector..J.| 000018e0 2e 6f 6c 64 62 79 74 65 76 0d 06 54 25 45 51 55 |.oldbytev..T%EQU| 000018f0 57 20 26 30 30 20 5c 20 6f 72 69 67 69 6e 61 6c |W &00 \ original| 00001900 20 4f 73 62 79 74 65 20 76 65 63 74 6f 72 0d 06 | Osbyte vector..| 00001910 5e 0b 2e 78 63 6f 6f 72 64 0d 06 68 2b 45 51 55 |^..xcoord..h+EQU| 00001920 42 20 26 38 30 20 5c 20 58 20 63 6f 6f 72 64 69 |B &80 \ X coordi| 00001930 6e 61 74 65 2c 20 72 61 6e 67 65 20 30 20 74 6f |nate, range 0 to| 00001940 20 32 35 35 0d 06 72 0b 2e 79 63 6f 6f 72 64 0d | 255..r..ycoord.| 00001950 06 7c 2b 45 51 55 42 20 26 38 30 20 5c 20 59 20 |.|+EQUB &80 \ Y | 00001960 63 6f 6f 72 64 69 6e 61 74 65 2c 20 72 61 6e 67 |coordinate, rang| 00001970 65 20 30 20 74 6f 20 32 35 35 0d 06 86 0d 2e 6c |e 0 to 255.....l| 00001980 61 73 74 62 79 74 65 0d 06 90 05 5d 0d 06 9a 05 |astbyte....]....| 00001990 ed 0d 06 a4 0b d6 20 6d 63 6f 64 65 0d 06 ae 06 |...... mcode....| 000019a0 eb 37 0d 06 b8 48 6d 6f 75 73 65 24 3d bd 31 34 |.7...Hmouse$=.14| 000019b0 31 2b bd 31 33 32 2b bd 31 35 37 2b bd 31 33 31 |1+.132+.157+.131| 000019c0 2b 22 4d 6f 75 73 65 20 63 6f 6f 72 64 69 6e 61 |+"Mouse coordina| 000019d0 74 65 73 20 76 69 61 20 41 44 56 41 4c 28 30 2d |tes via ADVAL(0-| 000019e0 34 29 20 20 22 2b bd 31 35 36 0d 06 c2 10 f1 8a |4) "+.156......| 000019f0 30 2c 31 29 6d 6f 75 73 65 24 0d 06 cc 10 f1 8a |0,1)mouse$......| 00001a00 30 2c 32 29 6d 6f 75 73 65 24 0d 06 d6 2d f1 8a |0,2)mouse$...-..| 00001a10 31 30 2c 36 29 22 42 79 74 65 73 20 75 73 65 64 |10,6)"Bytes used| 00001a20 20 3d 20 26 22 3b 7e 28 6c 61 73 74 62 79 74 65 | = &";~(lastbyte| 00001a30 2d 6d 63 6f 64 65 29 0d 06 e0 0d ee 85 20 e5 20 |-mcode)...... . | 00001a40 8d 44 62 47 0d 06 ea 12 ef 32 33 2c 31 2c 30 3b |.DbG.....23,1,0;| 00001a50 30 3b 30 3b 30 3b 0d 06 f4 05 f5 0d 06 fe 20 f1 |0;0;0;........ .| 00001a60 8a 31 30 2c 31 30 29 22 58 20 3d 20 26 22 3b 7e |.10,10)"X = &";~| 00001a70 3f 78 63 6f 6f 72 64 3b 22 20 22 0d 07 08 20 f1 |?xcoord;" "... .| 00001a80 8a 32 30 2c 31 30 29 22 59 20 3d 20 26 22 3b 7e |.20,10)"Y = &";~| 00001a90 3f 79 63 6f 6f 72 64 3b 22 20 22 0d 07 12 10 61 |?ycoord;" "....a| 00001aa0 64 76 61 6c 3d 96 28 30 29 80 33 0d 07 1c 23 f1 |dval=.(0).3...#.| 00001ab0 8a 31 30 2c 31 34 29 22 41 44 56 41 4c 28 30 29 |.10,14)"ADVAL(0)| 00001ac0 41 4e 44 33 20 3d 20 22 3b 61 64 76 61 6c 0d 07 |AND3 = ";adval..| 00001ad0 26 2f e7 20 61 64 76 61 6c 3d 32 20 f1 8a 32 32 |&/. adval=2 ..22| 00001ae0 2c 31 37 29 22 52 69 67 68 74 22 20 8b 20 f1 8a |,17)"Right" . ..| 00001af0 32 32 2c 31 37 29 22 20 20 20 20 20 22 0d 07 30 |22,17)" "..0| 00001b00 2e e7 20 61 64 76 61 6c 3d 33 20 20 f1 8a 31 36 |.. adval=3 ..16| 00001b10 2c 31 37 29 22 42 6f 74 68 22 20 8b 20 f1 8a 31 |,17)"Both" . ..1| 00001b20 36 2c 31 37 29 22 20 20 20 20 22 0d 07 3a 2d e7 |6,17)" "..:-.| 00001b30 20 61 64 76 61 6c 3d 31 20 f1 8a 31 30 2c 31 37 | adval=1 ..10,17| 00001b40 29 22 4c 65 66 74 22 20 8b 20 f1 8a 31 30 2c 31 |)"Left" . ..10,1| 00001b50 37 29 22 20 20 20 20 22 0d 07 44 44 f1 8a 32 2c |7)" "..DD..2,| 00001b60 32 30 29 22 41 44 56 41 4c 28 31 29 20 3d 20 22 |20)"ADVAL(1) = "| 00001b70 3b 96 28 31 29 3b 22 20 20 20 20 22 8a 32 32 2c |;.(1);" ".22,| 00001b80 32 30 29 22 41 44 56 41 4c 28 32 29 20 3d 20 22 |20)"ADVAL(2) = "| 00001b90 3b 96 28 32 29 3b 22 20 20 20 20 22 0d 07 4e 44 |;.(2);" "..ND| 00001ba0 f1 8a 32 2c 32 32 29 22 41 44 56 41 4c 28 33 29 |..2,22)"ADVAL(3)| 00001bb0 20 3d 20 22 3b 96 28 31 29 3b 22 20 20 20 20 22 | = ";.(1);" "| 00001bc0 8a 32 32 2c 32 32 29 22 41 44 56 41 4c 28 34 29 |.22,22)"ADVAL(4)| 00001bd0 20 3d 20 22 3b 96 28 34 29 3b 22 20 20 20 20 22 | = ";.(4);" "| 00001be0 0d 07 58 07 fd 20 a3 0d 07 62 0b d6 20 6d 63 6f |..X.. ...b.. mco| 00001bf0 64 65 0d 07 6c 19 ef 32 33 2c 31 2c 31 3b 30 3b |de..l..23,1,1;0;| 00001c00 30 3b 30 3b 33 31 2c 30 2c 32 33 0d 07 76 05 e0 |0;0;31,0,23..v..| 00001c10 0d ff |..| 00001c12
01-01-89/ANMOUSE.m0
01-01-89/ANMOUSE.m1
01-01-89/ANMOUSE.m2
01-01-89/ANMOUSE.m4
01-01-89/ANMOUSE.m5
.