Home » Personal collection » Acorn ADFS disks » Electron_User_Group » EUG_30.ADF » F/+HINT3

F/+HINT3

This website contains an archive of files for the Acorn Electron, BBC Micro, Acorn Archimedes, Commodore 16 and Commodore 64 computers, which Dominic Ford has rescued from his private collection of floppy disks and cassettes.

Some of these files were originally commercial releases in the 1980s and 1990s, but they are now widely available online. I assume that copyright over them is no longer being asserted. If you own the copyright and would like files to be removed, please contact me.

Tape/disk: Home » Personal collection » Acorn ADFS disks » Electron_User_Group » EUG_30.ADF
Filename: F/+HINT3
Read OK:
File size: 0EE1 bytes
Load address: 2B204556
Exec address: 544E4948
File contents
19  ADOUT - System audio output
      This is the filtered output of the sum of all audio inputs to the
      host computer.  No significant load should be taken from this node.

20  AGND - Audio Ground
      This is the zero volt return for ADOUT.  It should be used instead
      of the system zero volt connection to reduce audio noise.

21  ADIN - Cartridge audio output
      In the Electron:
      This is merely a connection from one cartridge to the other.

      In the Master 128:
      This is an output to the host computer audio circuitry.  It 'sees'
      an impedance of at least 1.0kOhms.  Two cartridges with audio output
      should not be inserted into the host computer at the same time.

22  0V - Zero volts
      This is the system earth return for digital signals.


SIDE 'B'

1    +5V - Power supply
      This is the system logic supply rail.  No more than 150mA should be
drawn by a cartridge in a fully configured Master 128 computer, ie with
internal Second Processor fitted.  No more than 10mA should be drawn by a
cartridge fitted to the Electron.

2    A10 - Address line 10 : Input with TTL levels

3    D3 - Data bus line 3 : Input/Output with TTL levels

4    A11 - Address line 11 : Input with TTL levels

5    A9 - Address line 9 : Input with TTL levels

6    D7 - Most significant data bus line : Input/Output with TTL levels

7    D6 - Data bus line 6 : Input/Output with TTL levels

8    D5 - Data bus line 5 : Input/Output with TTL levels

9    D4 - Data bus line 4 : Input/Output with TTL levels

10  nOE2 - Output Enable : Input with TTL levels
      This line provides an additional active low output enable for ROMs
in the Electron.  This corresponds to ROM position 13 and consequently
responds quickly to service calls.  it is low during the active low
portion of PH12.  It is not guaranteed to be high at other times.

      LPSTB - Light pen strobe
      A connection with a pull up to +5V is provided to the CRTC light pen
strobe and system interrupt structure.  When an on-board link is removed,
this connection is merely a link from one cartridge to the other.

11  BA7 - Buffered address line 7 : Input with TTL levels
      The buffered address lines hold addresses valid for 125ns after PH12
goes low.  They are not buffered or held valid for an extended period in
the Electron.

12  BA6 - Buffered address line 6 : Input with TTL levels

13  BA5 - Buffered address line 5 : Input with TTL levels

14  BA4 - Buffered address line 4 : Input with TTL levels

15  BA3 - Buffered address line 3 : Input with TTL levels

16  BA2 - Buffered address line 2 : Input with TTL levels

17  BA1 - Buffered address line 1 : Input with TTL levels

18  BA0 - Buffered address line 0 : Input with TTL levels

19  D0 - Data bus line 0 : Input/Output with TTL levels

20  D2 - Data bus line 2 : Input/Output with TTL levels

21  D1 - Data bus line 1 : Input/Output with TTL levels

22  0V - Zero volts
      This is the earth return for digital signals

      Where two or more cartridges are fitted, any host computer links
affect ALL cartridges.


3.0  Memory Map

All accesses to the cartridges are performed at 2MHz.  The memory map
within the area &FC00 to &FD00 differs between the Electron and the Master
128:


3.1  Master 128 Memory Map

At the time of writing the memory map within the areas INFC and INFD in
the Master 128 computer are as follows:

        &FCFF           Paging register for memory in the &8000 to &BFFF
                        region.                                                                                                     
                                  
Paging logic has to be implemented in each cartridge as necessary.
        &FC82
        &FC81           Speech system
        &FC80 to &FCFE  Reserved for use by Acorn.

00000000  31 39 20 20 41 44 4f 55  54 20 2d 20 53 79 73 74  |19  ADOUT - Syst|
00000010  65 6d 20 61 75 64 69 6f  20 6f 75 74 70 75 74 0d  |em audio output.|
00000020  20 20 20 20 20 20 54 68  69 73 20 69 73 20 74 68  |      This is th|
00000030  65 20 66 69 6c 74 65 72  65 64 20 6f 75 74 70 75  |e filtered outpu|
00000040  74 20 6f 66 20 74 68 65  20 73 75 6d 20 6f 66 20  |t of the sum of |
00000050  61 6c 6c 20 61 75 64 69  6f 20 69 6e 70 75 74 73  |all audio inputs|
00000060  20 74 6f 20 74 68 65 0d  20 20 20 20 20 20 68 6f  | to the.      ho|
00000070  73 74 20 63 6f 6d 70 75  74 65 72 2e 20 20 4e 6f  |st computer.  No|
00000080  20 73 69 67 6e 69 66 69  63 61 6e 74 20 6c 6f 61  | significant loa|
00000090  64 20 73 68 6f 75 6c 64  20 62 65 20 74 61 6b 65  |d should be take|
000000a0  6e 20 66 72 6f 6d 20 74  68 69 73 20 6e 6f 64 65  |n from this node|
000000b0  2e 0d 0d 32 30 20 20 41  47 4e 44 20 2d 20 41 75  |...20  AGND - Au|
000000c0  64 69 6f 20 47 72 6f 75  6e 64 0d 20 20 20 20 20  |dio Ground.     |
000000d0  20 54 68 69 73 20 69 73  20 74 68 65 20 7a 65 72  | This is the zer|
000000e0  6f 20 76 6f 6c 74 20 72  65 74 75 72 6e 20 66 6f  |o volt return fo|
000000f0  72 20 41 44 4f 55 54 2e  20 20 49 74 20 73 68 6f  |r ADOUT.  It sho|
00000100  75 6c 64 20 62 65 20 75  73 65 64 20 69 6e 73 74  |uld be used inst|
00000110  65 61 64 0d 20 20 20 20  20 20 6f 66 20 74 68 65  |ead.      of the|
00000120  20 73 79 73 74 65 6d 20  7a 65 72 6f 20 76 6f 6c  | system zero vol|
00000130  74 20 63 6f 6e 6e 65 63  74 69 6f 6e 20 74 6f 20  |t connection to |
00000140  72 65 64 75 63 65 20 61  75 64 69 6f 20 6e 6f 69  |reduce audio noi|
00000150  73 65 2e 0d 0d 32 31 20  20 41 44 49 4e 20 2d 20  |se...21  ADIN - |
00000160  43 61 72 74 72 69 64 67  65 20 61 75 64 69 6f 20  |Cartridge audio |
00000170  6f 75 74 70 75 74 0d 20  20 20 20 20 20 49 6e 20  |output.      In |
00000180  74 68 65 20 45 6c 65 63  74 72 6f 6e 3a 0d 20 20  |the Electron:.  |
00000190  20 20 20 20 54 68 69 73  20 69 73 20 6d 65 72 65  |    This is mere|
000001a0  6c 79 20 61 20 63 6f 6e  6e 65 63 74 69 6f 6e 20  |ly a connection |
000001b0  66 72 6f 6d 20 6f 6e 65  20 63 61 72 74 72 69 64  |from one cartrid|
000001c0  67 65 20 74 6f 20 74 68  65 20 6f 74 68 65 72 2e  |ge to the other.|
000001d0  0d 0d 20 20 20 20 20 20  49 6e 20 74 68 65 20 4d  |..      In the M|
000001e0  61 73 74 65 72 20 31 32  38 3a 0d 20 20 20 20 20  |aster 128:.     |
000001f0  20 54 68 69 73 20 69 73  20 61 6e 20 6f 75 74 70  | This is an outp|
00000200  75 74 20 74 6f 20 74 68  65 20 68 6f 73 74 20 63  |ut to the host c|
00000210  6f 6d 70 75 74 65 72 20  61 75 64 69 6f 20 63 69  |omputer audio ci|
00000220  72 63 75 69 74 72 79 2e  20 20 49 74 20 27 73 65  |rcuitry.  It 'se|
00000230  65 73 27 0d 20 20 20 20  20 20 61 6e 20 69 6d 70  |es'.      an imp|
00000240  65 64 61 6e 63 65 20 6f  66 20 61 74 20 6c 65 61  |edance of at lea|
00000250  73 74 20 31 2e 30 6b 4f  68 6d 73 2e 20 20 54 77  |st 1.0kOhms.  Tw|
00000260  6f 20 63 61 72 74 72 69  64 67 65 73 20 77 69 74  |o cartridges wit|
00000270  68 20 61 75 64 69 6f 20  6f 75 74 70 75 74 0d 20  |h audio output. |
00000280  20 20 20 20 20 73 68 6f  75 6c 64 20 6e 6f 74 20  |     should not |
00000290  62 65 20 69 6e 73 65 72  74 65 64 20 69 6e 74 6f  |be inserted into|
000002a0  20 74 68 65 20 68 6f 73  74 20 63 6f 6d 70 75 74  | the host comput|
000002b0  65 72 20 61 74 20 74 68  65 20 73 61 6d 65 20 74  |er at the same t|
000002c0  69 6d 65 2e 0d 0d 32 32  20 20 30 56 20 2d 20 5a  |ime...22  0V - Z|
000002d0  65 72 6f 20 76 6f 6c 74  73 0d 20 20 20 20 20 20  |ero volts.      |
000002e0  54 68 69 73 20 69 73 20  74 68 65 20 73 79 73 74  |This is the syst|
000002f0  65 6d 20 65 61 72 74 68  20 72 65 74 75 72 6e 20  |em earth return |
00000300  66 6f 72 20 64 69 67 69  74 61 6c 20 73 69 67 6e  |for digital sign|
00000310  61 6c 73 2e 0d 0d 0d 53  49 44 45 20 27 42 27 0d  |als....SIDE 'B'.|
00000320  0d 31 20 20 20 20 2b 35  56 20 2d 20 50 6f 77 65  |.1    +5V - Powe|
00000330  72 20 73 75 70 70 6c 79  0d 20 20 20 20 20 20 54  |r supply.      T|
00000340  68 69 73 20 69 73 20 74  68 65 20 73 79 73 74 65  |his is the syste|
00000350  6d 20 6c 6f 67 69 63 20  73 75 70 70 6c 79 20 72  |m logic supply r|
00000360  61 69 6c 2e 20 20 4e 6f  20 6d 6f 72 65 20 74 68  |ail.  No more th|
00000370  61 6e 20 31 35 30 6d 41  20 73 68 6f 75 6c 64 20  |an 150mA should |
00000380  62 65 0d 64 72 61 77 6e  20 62 79 20 61 20 63 61  |be.drawn by a ca|
00000390  72 74 72 69 64 67 65 20  69 6e 20 61 20 66 75 6c  |rtridge in a ful|
000003a0  6c 79 20 63 6f 6e 66 69  67 75 72 65 64 20 4d 61  |ly configured Ma|
000003b0  73 74 65 72 20 31 32 38  20 63 6f 6d 70 75 74 65  |ster 128 compute|
000003c0  72 2c 20 69 65 20 77 69  74 68 0d 69 6e 74 65 72  |r, ie with.inter|
000003d0  6e 61 6c 20 53 65 63 6f  6e 64 20 50 72 6f 63 65  |nal Second Proce|
000003e0  73 73 6f 72 20 66 69 74  74 65 64 2e 20 20 4e 6f  |ssor fitted.  No|
000003f0  20 6d 6f 72 65 20 74 68  61 6e 20 31 30 6d 41 20  | more than 10mA |
00000400  73 68 6f 75 6c 64 20 62  65 20 64 72 61 77 6e 20  |should be drawn |
00000410  62 79 20 61 0d 63 61 72  74 72 69 64 67 65 20 66  |by a.cartridge f|
00000420  69 74 74 65 64 20 74 6f  20 74 68 65 20 45 6c 65  |itted to the Ele|
00000430  63 74 72 6f 6e 2e 0d 0d  32 20 20 20 20 41 31 30  |ctron...2    A10|
00000440  20 2d 20 41 64 64 72 65  73 73 20 6c 69 6e 65 20  | - Address line |
00000450  31 30 20 3a 20 49 6e 70  75 74 20 77 69 74 68 20  |10 : Input with |
00000460  54 54 4c 20 6c 65 76 65  6c 73 0d 0d 33 20 20 20  |TTL levels..3   |
00000470  20 44 33 20 2d 20 44 61  74 61 20 62 75 73 20 6c  | D3 - Data bus l|
00000480  69 6e 65 20 33 20 3a 20  49 6e 70 75 74 2f 4f 75  |ine 3 : Input/Ou|
00000490  74 70 75 74 20 77 69 74  68 20 54 54 4c 20 6c 65  |tput with TTL le|
000004a0  76 65 6c 73 0d 0d 34 20  20 20 20 41 31 31 20 2d  |vels..4    A11 -|
000004b0  20 41 64 64 72 65 73 73  20 6c 69 6e 65 20 31 31  | Address line 11|
000004c0  20 3a 20 49 6e 70 75 74  20 77 69 74 68 20 54 54  | : Input with TT|
000004d0  4c 20 6c 65 76 65 6c 73  0d 0d 35 20 20 20 20 41  |L levels..5    A|
000004e0  39 20 2d 20 41 64 64 72  65 73 73 20 6c 69 6e 65  |9 - Address line|
000004f0  20 39 20 3a 20 49 6e 70  75 74 20 77 69 74 68 20  | 9 : Input with |
00000500  54 54 4c 20 6c 65 76 65  6c 73 0d 0d 36 20 20 20  |TTL levels..6   |
00000510  20 44 37 20 2d 20 4d 6f  73 74 20 73 69 67 6e 69  | D7 - Most signi|
00000520  66 69 63 61 6e 74 20 64  61 74 61 20 62 75 73 20  |ficant data bus |
00000530  6c 69 6e 65 20 3a 20 49  6e 70 75 74 2f 4f 75 74  |line : Input/Out|
00000540  70 75 74 20 77 69 74 68  20 54 54 4c 20 6c 65 76  |put with TTL lev|
00000550  65 6c 73 0d 0d 37 20 20  20 20 44 36 20 2d 20 44  |els..7    D6 - D|
00000560  61 74 61 20 62 75 73 20  6c 69 6e 65 20 36 20 3a  |ata bus line 6 :|
00000570  20 49 6e 70 75 74 2f 4f  75 74 70 75 74 20 77 69  | Input/Output wi|
00000580  74 68 20 54 54 4c 20 6c  65 76 65 6c 73 0d 0d 38  |th TTL levels..8|
00000590  20 20 20 20 44 35 20 2d  20 44 61 74 61 20 62 75  |    D5 - Data bu|
000005a0  73 20 6c 69 6e 65 20 35  20 3a 20 49 6e 70 75 74  |s line 5 : Input|
000005b0  2f 4f 75 74 70 75 74 20  77 69 74 68 20 54 54 4c  |/Output with TTL|
000005c0  20 6c 65 76 65 6c 73 0d  0d 39 20 20 20 20 44 34  | levels..9    D4|
000005d0  20 2d 20 44 61 74 61 20  62 75 73 20 6c 69 6e 65  | - Data bus line|
000005e0  20 34 20 3a 20 49 6e 70  75 74 2f 4f 75 74 70 75  | 4 : Input/Outpu|
000005f0  74 20 77 69 74 68 20 54  54 4c 20 6c 65 76 65 6c  |t with TTL level|
00000600  73 0d 0d 31 30 20 20 6e  4f 45 32 20 2d 20 4f 75  |s..10  nOE2 - Ou|
00000610  74 70 75 74 20 45 6e 61  62 6c 65 20 3a 20 49 6e  |tput Enable : In|
00000620  70 75 74 20 77 69 74 68  20 54 54 4c 20 6c 65 76  |put with TTL lev|
00000630  65 6c 73 0d 20 20 20 20  20 20 54 68 69 73 20 6c  |els.      This l|
00000640  69 6e 65 20 70 72 6f 76  69 64 65 73 20 61 6e 20  |ine provides an |
00000650  61 64 64 69 74 69 6f 6e  61 6c 20 61 63 74 69 76  |additional activ|
00000660  65 20 6c 6f 77 20 6f 75  74 70 75 74 20 65 6e 61  |e low output ena|
00000670  62 6c 65 20 66 6f 72 20  52 4f 4d 73 0d 69 6e 20  |ble for ROMs.in |
00000680  74 68 65 20 45 6c 65 63  74 72 6f 6e 2e 20 20 54  |the Electron.  T|
00000690  68 69 73 20 63 6f 72 72  65 73 70 6f 6e 64 73 20  |his corresponds |
000006a0  74 6f 20 52 4f 4d 20 70  6f 73 69 74 69 6f 6e 20  |to ROM position |
000006b0  31 33 20 61 6e 64 20 63  6f 6e 73 65 71 75 65 6e  |13 and consequen|
000006c0  74 6c 79 0d 72 65 73 70  6f 6e 64 73 20 71 75 69  |tly.responds qui|
000006d0  63 6b 6c 79 20 74 6f 20  73 65 72 76 69 63 65 20  |ckly to service |
000006e0  63 61 6c 6c 73 2e 20 20  69 74 20 69 73 20 6c 6f  |calls.  it is lo|
000006f0  77 20 64 75 72 69 6e 67  20 74 68 65 20 61 63 74  |w during the act|
00000700  69 76 65 20 6c 6f 77 0d  70 6f 72 74 69 6f 6e 20  |ive low.portion |
00000710  6f 66 20 50 48 31 32 2e  20 20 49 74 20 69 73 20  |of PH12.  It is |
00000720  6e 6f 74 20 67 75 61 72  61 6e 74 65 65 64 20 74  |not guaranteed t|
00000730  6f 20 62 65 20 68 69 67  68 20 61 74 20 6f 74 68  |o be high at oth|
00000740  65 72 20 74 69 6d 65 73  2e 0d 0d 20 20 20 20 20  |er times...     |
00000750  20 4c 50 53 54 42 20 2d  20 4c 69 67 68 74 20 70  | LPSTB - Light p|
00000760  65 6e 20 73 74 72 6f 62  65 0d 20 20 20 20 20 20  |en strobe.      |
00000770  41 20 63 6f 6e 6e 65 63  74 69 6f 6e 20 77 69 74  |A connection wit|
00000780  68 20 61 20 70 75 6c 6c  20 75 70 20 74 6f 20 2b  |h a pull up to +|
00000790  35 56 20 69 73 20 70 72  6f 76 69 64 65 64 20 74  |5V is provided t|
000007a0  6f 20 74 68 65 20 43 52  54 43 20 6c 69 67 68 74  |o the CRTC light|
000007b0  20 70 65 6e 0d 73 74 72  6f 62 65 20 61 6e 64 20  | pen.strobe and |
000007c0  73 79 73 74 65 6d 20 69  6e 74 65 72 72 75 70 74  |system interrupt|
000007d0  20 73 74 72 75 63 74 75  72 65 2e 20 20 57 68 65  | structure.  Whe|
000007e0  6e 20 61 6e 20 6f 6e 2d  62 6f 61 72 64 20 6c 69  |n an on-board li|
000007f0  6e 6b 20 69 73 20 72 65  6d 6f 76 65 64 2c 0d 74  |nk is removed,.t|
00000800  68 69 73 20 63 6f 6e 6e  65 63 74 69 6f 6e 20 69  |his connection i|
00000810  73 20 6d 65 72 65 6c 79  20 61 20 6c 69 6e 6b 20  |s merely a link |
00000820  66 72 6f 6d 20 6f 6e 65  20 63 61 72 74 72 69 64  |from one cartrid|
00000830  67 65 20 74 6f 20 74 68  65 20 6f 74 68 65 72 2e  |ge to the other.|
00000840  0d 0d 31 31 20 20 42 41  37 20 2d 20 42 75 66 66  |..11  BA7 - Buff|
00000850  65 72 65 64 20 61 64 64  72 65 73 73 20 6c 69 6e  |ered address lin|
00000860  65 20 37 20 3a 20 49 6e  70 75 74 20 77 69 74 68  |e 7 : Input with|
00000870  20 54 54 4c 20 6c 65 76  65 6c 73 0d 20 20 20 20  | TTL levels.    |
00000880  20 20 54 68 65 20 62 75  66 66 65 72 65 64 20 61  |  The buffered a|
00000890  64 64 72 65 73 73 20 6c  69 6e 65 73 20 68 6f 6c  |ddress lines hol|
000008a0  64 20 61 64 64 72 65 73  73 65 73 20 76 61 6c 69  |d addresses vali|
000008b0  64 20 66 6f 72 20 31 32  35 6e 73 20 61 66 74 65  |d for 125ns afte|
000008c0  72 20 50 48 31 32 0d 67  6f 65 73 20 6c 6f 77 2e  |r PH12.goes low.|
000008d0  20 20 54 68 65 79 20 61  72 65 20 6e 6f 74 20 62  |  They are not b|
000008e0  75 66 66 65 72 65 64 20  6f 72 20 68 65 6c 64 20  |uffered or held |
000008f0  76 61 6c 69 64 20 66 6f  72 20 61 6e 20 65 78 74  |valid for an ext|
00000900  65 6e 64 65 64 20 70 65  72 69 6f 64 20 69 6e 0d  |ended period in.|
00000910  74 68 65 20 45 6c 65 63  74 72 6f 6e 2e 0d 0d 31  |the Electron...1|
00000920  32 20 20 42 41 36 20 2d  20 42 75 66 66 65 72 65  |2  BA6 - Buffere|
00000930  64 20 61 64 64 72 65 73  73 20 6c 69 6e 65 20 36  |d address line 6|
00000940  20 3a 20 49 6e 70 75 74  20 77 69 74 68 20 54 54  | : Input with TT|
00000950  4c 20 6c 65 76 65 6c 73  0d 0d 31 33 20 20 42 41  |L levels..13  BA|
00000960  35 20 2d 20 42 75 66 66  65 72 65 64 20 61 64 64  |5 - Buffered add|
00000970  72 65 73 73 20 6c 69 6e  65 20 35 20 3a 20 49 6e  |ress line 5 : In|
00000980  70 75 74 20 77 69 74 68  20 54 54 4c 20 6c 65 76  |put with TTL lev|
00000990  65 6c 73 0d 0d 31 34 20  20 42 41 34 20 2d 20 42  |els..14  BA4 - B|
000009a0  75 66 66 65 72 65 64 20  61 64 64 72 65 73 73 20  |uffered address |
000009b0  6c 69 6e 65 20 34 20 3a  20 49 6e 70 75 74 20 77  |line 4 : Input w|
000009c0  69 74 68 20 54 54 4c 20  6c 65 76 65 6c 73 0d 0d  |ith TTL levels..|
000009d0  31 35 20 20 42 41 33 20  2d 20 42 75 66 66 65 72  |15  BA3 - Buffer|
000009e0  65 64 20 61 64 64 72 65  73 73 20 6c 69 6e 65 20  |ed address line |
000009f0  33 20 3a 20 49 6e 70 75  74 20 77 69 74 68 20 54  |3 : Input with T|
00000a00  54 4c 20 6c 65 76 65 6c  73 0d 0d 31 36 20 20 42  |TL levels..16  B|
00000a10  41 32 20 2d 20 42 75 66  66 65 72 65 64 20 61 64  |A2 - Buffered ad|
00000a20  64 72 65 73 73 20 6c 69  6e 65 20 32 20 3a 20 49  |dress line 2 : I|
00000a30  6e 70 75 74 20 77 69 74  68 20 54 54 4c 20 6c 65  |nput with TTL le|
00000a40  76 65 6c 73 0d 0d 31 37  20 20 42 41 31 20 2d 20  |vels..17  BA1 - |
00000a50  42 75 66 66 65 72 65 64  20 61 64 64 72 65 73 73  |Buffered address|
00000a60  20 6c 69 6e 65 20 31 20  3a 20 49 6e 70 75 74 20  | line 1 : Input |
00000a70  77 69 74 68 20 54 54 4c  20 6c 65 76 65 6c 73 0d  |with TTL levels.|
00000a80  0d 31 38 20 20 42 41 30  20 2d 20 42 75 66 66 65  |.18  BA0 - Buffe|
00000a90  72 65 64 20 61 64 64 72  65 73 73 20 6c 69 6e 65  |red address line|
00000aa0  20 30 20 3a 20 49 6e 70  75 74 20 77 69 74 68 20  | 0 : Input with |
00000ab0  54 54 4c 20 6c 65 76 65  6c 73 0d 0d 31 39 20 20  |TTL levels..19  |
00000ac0  44 30 20 2d 20 44 61 74  61 20 62 75 73 20 6c 69  |D0 - Data bus li|
00000ad0  6e 65 20 30 20 3a 20 49  6e 70 75 74 2f 4f 75 74  |ne 0 : Input/Out|
00000ae0  70 75 74 20 77 69 74 68  20 54 54 4c 20 6c 65 76  |put with TTL lev|
00000af0  65 6c 73 0d 0d 32 30 20  20 44 32 20 2d 20 44 61  |els..20  D2 - Da|
00000b00  74 61 20 62 75 73 20 6c  69 6e 65 20 32 20 3a 20  |ta bus line 2 : |
00000b10  49 6e 70 75 74 2f 4f 75  74 70 75 74 20 77 69 74  |Input/Output wit|
00000b20  68 20 54 54 4c 20 6c 65  76 65 6c 73 0d 0d 32 31  |h TTL levels..21|
00000b30  20 20 44 31 20 2d 20 44  61 74 61 20 62 75 73 20  |  D1 - Data bus |
00000b40  6c 69 6e 65 20 31 20 3a  20 49 6e 70 75 74 2f 4f  |line 1 : Input/O|
00000b50  75 74 70 75 74 20 77 69  74 68 20 54 54 4c 20 6c  |utput with TTL l|
00000b60  65 76 65 6c 73 0d 0d 32  32 20 20 30 56 20 2d 20  |evels..22  0V - |
00000b70  5a 65 72 6f 20 76 6f 6c  74 73 0d 20 20 20 20 20  |Zero volts.     |
00000b80  20 54 68 69 73 20 69 73  20 74 68 65 20 65 61 72  | This is the ear|
00000b90  74 68 20 72 65 74 75 72  6e 20 66 6f 72 20 64 69  |th return for di|
00000ba0  67 69 74 61 6c 20 73 69  67 6e 61 6c 73 0d 0d 20  |gital signals.. |
00000bb0  20 20 20 20 20 57 68 65  72 65 20 74 77 6f 20 6f  |     Where two o|
00000bc0  72 20 6d 6f 72 65 20 63  61 72 74 72 69 64 67 65  |r more cartridge|
00000bd0  73 20 61 72 65 20 66 69  74 74 65 64 2c 20 61 6e  |s are fitted, an|
00000be0  79 20 68 6f 73 74 20 63  6f 6d 70 75 74 65 72 20  |y host computer |
00000bf0  6c 69 6e 6b 73 0d 61 66  66 65 63 74 20 41 4c 4c  |links.affect ALL|
00000c00  20 63 61 72 74 72 69 64  67 65 73 2e 0d 0d 0d 33  | cartridges....3|
00000c10  2e 30 20 20 4d 65 6d 6f  72 79 20 4d 61 70 0d 0d  |.0  Memory Map..|
00000c20  41 6c 6c 20 61 63 63 65  73 73 65 73 20 74 6f 20  |All accesses to |
00000c30  74 68 65 20 63 61 72 74  72 69 64 67 65 73 20 61  |the cartridges a|
00000c40  72 65 20 70 65 72 66 6f  72 6d 65 64 20 61 74 20  |re performed at |
00000c50  32 4d 48 7a 2e 20 20 54  68 65 20 6d 65 6d 6f 72  |2MHz.  The memor|
00000c60  79 20 6d 61 70 0d 77 69  74 68 69 6e 20 74 68 65  |y map.within the|
00000c70  20 61 72 65 61 20 26 46  43 30 30 20 74 6f 20 26  | area &FC00 to &|
00000c80  46 44 30 30 20 64 69 66  66 65 72 73 20 62 65 74  |FD00 differs bet|
00000c90  77 65 65 6e 20 74 68 65  20 45 6c 65 63 74 72 6f  |ween the Electro|
00000ca0  6e 20 61 6e 64 20 74 68  65 20 4d 61 73 74 65 72  |n and the Master|
00000cb0  0d 31 32 38 3a 0d 0d 0d  33 2e 31 20 20 4d 61 73  |.128:...3.1  Mas|
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00000ee0  0d                                                |.|
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